[GPU] Fix 1d onednn convolutions (#17038)
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@ -163,8 +163,6 @@ protected:
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return weights_reorder_params;
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return weights_reorder_params;
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}
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}
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public:
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public:
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void save(BinaryOutputBuffer& ob) const override {
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void save(BinaryOutputBuffer& ob) const override {
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#ifdef ONEDNN_PRIMITIVE_SERIALIZATION
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#ifdef ONEDNN_PRIMITIVE_SERIALIZATION
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@ -37,6 +37,15 @@ static std::shared_ptr<dnnl::convolution_forward::primitive_desc> get_convolutio
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pad_r[i] = (os - 1) * stride[i] - is + kernel_range - pad_l[i];
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pad_r[i] = (os - 1) * stride[i] - is + kernel_range - pad_l[i];
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}
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}
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// Extend conv parameters in case if spatials rank of output memory doesn't match size of parameters
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int64_t insert_count = static_cast<int64_t>(output_md.get_dims().size()) - 2 - stride.size();
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if (insert_count > 0) {
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stride.insert(stride.end(), insert_count, 1);
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dilation.insert(dilation.end(), insert_count, 0);
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pad_l.insert(pad_l.end(), insert_count, 0);
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pad_r.insert(pad_r.end(), insert_count, 0);
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}
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if (!prim->bias.empty()) {
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if (!prim->bias.empty()) {
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auto bias_md = onednn::layout_to_memory_desc(impl_params.get_input_layout(2), dnnl::memory::format_tag::any, true);
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auto bias_md = onednn::layout_to_memory_desc(impl_params.get_input_layout(2), dnnl::memory::format_tag::any, true);
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return std::make_shared<dnnl::convolution_forward::primitive_desc>(
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return std::make_shared<dnnl::convolution_forward::primitive_desc>(
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@ -9227,6 +9227,81 @@ TEST(convolution_gpu_onednn, padding_for_cldnn_kernel_after_onednn) {
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}
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}
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}
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}
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TEST(convolution_gpu_onednn, spatial_1d) {
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auto& engine = get_test_engine();
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if (!engine.get_device_info().supports_immad)
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return;
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ov::PartialShape input_pshape = {1, 16, 6};
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ov::PartialShape weights_pshape = {16, 16, 3};
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layout in_layout{ input_pshape, data_types::f16, format::bfyx };
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layout weights_layout{ weights_pshape, data_types::f16, format::bfyx };
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auto input_data = generate_random_1d<FLOAT16>(in_layout.count(), -1, 1);
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auto input_mem = engine.allocate_memory(in_layout);
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set_values(input_mem, input_data);
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auto weights_data = generate_random_1d<FLOAT16>(weights_layout.count(), -1, 1);
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auto weights_mem = engine.allocate_memory(weights_layout);
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set_values(weights_mem, weights_data);
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auto input = input_layout("input", input_mem->get_layout());
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auto weights = data("weights", weights_mem);
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auto conv = convolution("conv",
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input_info("input"),
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{ "weights" },
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1,
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ov::Strides{1},
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ov::CoordinateDiff{0},
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ov::Strides{1},
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ov::CoordinateDiff{0},
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ov::CoordinateDiff{0});
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auto output_reorder = reorder("reorder", input_info("conv"), format::bfyx, data_types::f32 );
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topology t(input, weights, conv, output_reorder);
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ExecutionConfig config_test = get_test_default_config(engine);
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ov::intel_gpu::ImplementationDesc conv_impl_test = { format::b_fs_yx_fsv16, "", impl_types::onednn };
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config_test.set_property(ov::intel_gpu::force_implementations(ov::intel_gpu::ImplForcingMap{ { "conv", conv_impl_test } }));
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config_test.set_property(ov::intel_gpu::optimize_data(true));
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config_test.set_property(ov::intel_gpu::allow_new_shape_infer(true));
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ExecutionConfig config_ref = get_test_default_config(engine);
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ov::intel_gpu::ImplementationDesc conv_impl_ref = { format::bfyx, "", impl_types::ocl };
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config_ref.set_property(ov::intel_gpu::force_implementations(ov::intel_gpu::ImplForcingMap{{ "conv", conv_impl_ref } }));
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config_ref.set_property(ov::intel_gpu::optimize_data(true));
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config_ref.set_property(ov::intel_gpu::allow_new_shape_infer(true));
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network network_test(engine, t, config_test);
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network network_ref(engine, t, config_ref);
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network_test.set_input_data("input", input_mem);
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network_ref.set_input_data("input", input_mem);
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auto outputs_test = network_test.execute();
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auto outputs_ref = network_ref.execute();
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ASSERT_EQ(outputs_test.size(), size_t(1));
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ASSERT_EQ(outputs_test.begin()->first, "reorder");
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ASSERT_EQ(outputs_ref.size(), size_t(1));
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ASSERT_EQ(outputs_ref.begin()->first, "reorder");
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auto output_memory_test = outputs_test.at("reorder").get_memory();
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auto output_layout_test = output_memory_test->get_layout();
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cldnn::mem_lock<float> output_ptr_test(output_memory_test, get_test_stream());
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auto output_memory_ref = outputs_ref.at("reorder").get_memory();
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auto output_layout_ref = output_memory_ref->get_layout();
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cldnn::mem_lock<float> output_ptr_ref(output_memory_ref, get_test_stream());
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ov::PartialShape expected_shape = {1, 16, 4};
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ASSERT_EQ(output_layout_test.get_partial_shape(), expected_shape);
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ASSERT_EQ(output_layout_ref.get_partial_shape(), expected_shape);
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for (size_t i = 0; i < output_memory_ref->count(); i++) {
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ASSERT_EQ(output_ptr_ref.data()[i], output_ptr_test.data()[i]);
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}
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}
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TEST(convolution_gpu_onednn, quantized_onednn_convolution_u8s8f32_asymmetric_activations_per_tensor) {
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TEST(convolution_gpu_onednn, quantized_onednn_convolution_u8s8f32_asymmetric_activations_per_tensor) {
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auto& engine = get_test_engine();
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auto& engine = get_test_engine();
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if (!engine.get_device_info().supports_immad)
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if (!engine.get_device_info().supports_immad)
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