[GPU] Fix output format for FP16/FP32 Convolution output (#8223)
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@ -281,6 +281,12 @@ bool layout_optimizer::can_fuse_reorder(program_node& prev, program_node& next,
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(fmt_next == format::bs_fs_yx_bsv32_fsv16 && (prev_output_layout.size.feature[0] == 3 || prev_output_layout.size.feature[0] == 4))))
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return true;
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// Remove Reorder for Convolution: b_fs_yx_fsv32 (i8/u8) -> b_fs_yx_fsv16 (fp32/fp16)
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if (next.is_type<convolution>() && fmt_prev == format::b_fs_yx_fsv32 && fmt_next == format::b_fs_yx_fsv16 &&
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!data_type_traits::is_floating_point(prev_dt) && data_type_traits::is_floating_point(next_dt)) {
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return true;
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}
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if (next.is_type<quantize>())
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return true;
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@ -826,10 +832,14 @@ layout layout_optimizer::get_expected_layout(layout const& current_layout,
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/* ***************************** OneDNN impls format selection part ****************************** */
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if (i8_u8_input) {
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if ((non_grouped || valid_grouped || valid_int8_dw) && onednn_valid_post_ops && is_2d) {
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if (input_layout.size.batch[0] % 16 == 0)
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if (input_layout.size.batch[0] % 16 == 0) {
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expected_format = cldnn::format::bs_fs_yx_bsv32_fsv32;
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else
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expected_format = cldnn::format::b_fs_yx_fsv32;
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} else {
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if (data_type_traits::is_floating_point(output_layout.data_type))
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expected_format = cldnn::format::b_fs_yx_fsv16;
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else
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expected_format = cldnn::format::b_fs_yx_fsv32;
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}
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} else if ((_optimization_attributes.b_fs_yx_fsv16_network &&
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convolution_b_fs_yx_fsv16_opt(input_layout, output_layout, weights_layout, prim)) && is_2d) {
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if (is_dw)
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