Nikolay Tyukaevanddomi2000
ef45b5da8d
* Doc Migration from Gitlab (#1289) * doc migration * fix * Update FakeQuantize_1.md * Update performance_benchmarks.md * Updates graphs for FPGA * Update performance_benchmarks.md * Change DL Workbench structure (#1) * Changed DL Workbench structure * Fixed tags * fixes * Update ie_docs.xml * Update performance_benchmarks_faq.md * Fixes in DL Workbench layout * Fixes for CVS-31290 * [DL Workbench] Minor correction * Fix for CVS-30955 * Added nGraph deprecation notice as requested by Zoe * fix broken links in api doxy layouts * CVS-31131 fixes * Additional fixes * Fixed POT TOC * Update PAC_Configure.md PAC DCP 1.2.1 install guide. * Update inference_engine_intro.md * fix broken link * Update opset.md * fix * added opset4 to layout * added new opsets to layout, set labels for them * Update VisionAcceleratorFPGA_Configure.md Updated from 2020.3 to 2020.4 Co-authored-by: domi2000 <domi2000@users.noreply.github.com>
1.6 KiB
1.6 KiB
ReverseSequence
Versioned name: ReverseSequence-1
Category: data movement operation
Short description: ReverseSequence reverses variable length slices of data.
Detailed description: ReverseSequence slices input along the dimension specified in the batch_axis, and for each slice i, reverses the first lengths[i] (the second input) elements along the dimension specified in the seq_axis.
Attributes
-
batch_axis
- Description: batch_axis is the index of the batch dimension.
- Range of values: an integer. Can be negative.
- Type:
int - Default value: 0
- Required: no
-
seq_axis
- Description: seq_axis is the index of the sequence dimension.
- Range of values: an integer. Can be negative.
- Type:
int - Default value: 1
- Required: no
Inputs:
-
1: tensor with input data to reverse. Required.
-
2: 1D tensor populated with integers with sequence lengths in the 1st input tensor. Required.
Example
<layer ... type="ReverseSequence">
<data batch_axis="0" seq_axis="1"/>
<input>
<port id="0">
<dim>3</dim>
<dim>10</dim>
<dim>100</dim>
<dim>200</dim>
</port>
<port id="1">
<dim>3</dim>
</port>
</input>
<output>
<port id="2">
<dim>3</dim>
<dim>10</dim>
<dim>100</dim>
<dim>200</dim>
</port>
</output>
</layer>