diff --git a/src/plugins/AMD.cpp b/src/plugins/AMD.cpp index 1db98dd..66020b6 100644 --- a/src/plugins/AMD.cpp +++ b/src/plugins/AMD.cpp @@ -1008,6 +1008,62 @@ std::vector> getMinMemoryClock(AMDGPUData data) { }}; } +std::vector> getMaxCoreClock(AMDGPUData data) { + if (!data.ppTableType.has_value()) + return {}; + + auto t = *data.ppTableType; + if (t != Navi && t != SMU13 && t != Vega20Other) + return {}; + + auto lines = pstateSectionLinesWithRead("OD_SCLK", data); + if (lines.size() != 2) + return {}; + + auto range = parsePstateRangeLineWithRead("SCLK", data); + if (!range.has_value()) + return {}; + + // Second index is max + auto assignable = singleValueAssignable(CoreClock, 1, *range, _("MHz"), data); + if (!assignable.has_value()) + return {}; + + return {DeviceNode{ + .name = _("Maximum Core Clock"), + .interface = *assignable, + .hash = md5(data.pciId + "Maximum Core Clock"), + }}; +} + +std::vector> getMinCoreClock(AMDGPUData data) { + if (!data.ppTableType.has_value()) + return {}; + + auto t = *data.ppTableType; + if (t != Navi && t != SMU13 && t != Vega20Other) + return {}; + + auto lines = pstateSectionLinesWithRead("OD_SCLK", data); + if (lines.size() != 2) + return {}; + + auto range = parsePstateRangeLineWithRead("SCLK", data); + if (!range.has_value()) + return {}; + + // First index is min + auto assignable = singleValueAssignable(CoreClock, 0, *range, _("MHz"), data); + if (!assignable.has_value()) + return {}; + + return {DeviceNode{ + .name = _("Minimum Core Clock"), + .interface = *assignable, + .hash = md5(data.pciId + "Minimum Core Clock"), + }}; +} + std::vector> getVoltFreqRoot(AMDGPUData data) { if (data.ppTableType.has_value() && (*data.ppTableType == Navi || *data.ppTableType == SMU13)) @@ -1117,7 +1173,9 @@ auto gpuTree = TreeConstructor{ {getMemoryClockRead, {}}, {getCoreClockRead, {}}, {getMinMemoryClock, {}}, - {getMaxMemoryClock, {}} + {getMaxMemoryClock, {}}, + {getMinCoreClock, {}}, + {getMaxCoreClock, {}} }}, {getVoltageRead, {}}, {getForcePerfLevel, {}},