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tests: add AMD SEV bits into qemu-6.0.0 replies

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Currently we only have AMD SEV bits in qemu-2.12.0 replies which is way
too old to test new features that require AMD SEV as well.

Signed-off-by: Pavel Hrdina <phrdina@redhat.com>
Reviewed-by: Peter Krempa <pkrempa@redhat.com>
This commit is contained in:
Pavel Hrdina
2021-06-10 15:54:59 +02:00
parent 241969d465
commit 0b0a633d1a
5 changed files with 26 additions and 8 deletions
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5
tests/domaincapsdata/qemu_6.0.0-q35.x86_64.xml
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@@ -207,6 +207,9 @@
<genid supported='yes'/>
<backingStoreInput supported='yes'/>
<backup supported='no'/>
<sev supported='no'/>
<sev supported='yes'>
<cbitpos>47</cbitpos>
<reducedPhysBits>1</reducedPhysBits>
</sev>
</features>
</domainCapabilities>

5
tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml
View File

@@ -213,6 +213,9 @@
<genid supported='yes'/>
<backingStoreInput supported='yes'/>
<backup supported='no'/>
<sev supported='no'/>
<sev supported='yes'>
<cbitpos>47</cbitpos>
<reducedPhysBits>1</reducedPhysBits>
</sev>
</features>
</domainCapabilities>

5
tests/domaincapsdata/qemu_6.0.0.x86_64.xml
View File

@@ -207,6 +207,9 @@
<genid supported='yes'/>
<backingStoreInput supported='yes'/>
<backup supported='no'/>
<sev supported='no'/>
<sev supported='yes'>
<cbitpos>47</cbitpos>
<reducedPhysBits>1</reducedPhysBits>
</sev>
</features>
</domainCapabilities>