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conf, docs: Add support for direct and extended tlbflush features
Similarly to stimer-direct these are subelements of <tlbflush/> in the domain XML. Signed-off-by: Martin Kletzander <mkletzan@redhat.com> Reviewed-by: Michal Privoznik <mprivozn@redhat.com>
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@ -1993,7 +1993,10 @@ Hypervisors may allow certain CPU / machine features to be toggled on/off.
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<vendor_id state='on' value='KVM Hv'/>
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<frequencies state='on'/>
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<reenlightenment state='on'/>
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<tlbflush state='on'/>
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<tlbflush state='on'>
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<direct state='on'/>
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<extended state='on'/>
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</tlbflush>
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<ipi state='on'/>
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<evmcs state='on'/>
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<emsr_bitmap state='on'/>
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@ -2068,9 +2071,9 @@ are:
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Enable various features improving behavior of guests running Microsoft
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Windows.
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=============== ====================================================================== ============================================ =======================================================
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=============== ====================================================================== ============================================ ========================================================================
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Feature Description Value Since
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=============== ====================================================================== ============================================ =======================================================
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=============== ====================================================================== ============================================ ========================================================================
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relaxed Relax constraints on timers on, off :since:`1.0.0 (QEMU 2.0)`
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vapic Enable virtual APIC on, off :since:`1.1.0 (QEMU 2.0)`
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spinlocks Enable spinlock support on, off; retries - at least 4095 :since:`1.1.0 (QEMU 2.0)`
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@ -2082,13 +2085,13 @@ are:
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vendor_id Set hypervisor vendor id on, off; value - string, up to 12 characters :since:`1.3.3 (QEMU 2.5)`
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frequencies Expose frequency MSRs on, off :since:`4.7.0 (QEMU 2.12)`
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reenlightenment Enable re-enlightenment notification on migration on, off :since:`4.7.0 (QEMU 3.0)`
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tlbflush Enable PV TLB flush support on, off :since:`4.7.0 (QEMU 3.0)`
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tlbflush Enable PV TLB flush support on, off; direct - on,off; extended - on,off :since:`4.7.0 (QEMU 3.0), direct and extended modes 11.0.0 (QEMU 7.1.0)`
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ipi Enable PV IPI support on, off :since:`4.10.0 (QEMU 3.1)`
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evmcs Enable Enlightened VMCS on, off :since:`4.10.0 (QEMU 3.1)`
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avic Enable use Hyper-V SynIC with hardware APICv/AVIC on, off :since:`8.10.0 (QEMU 6.2)`
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emsr_bitmap Avoid unnecessary updates to L2 MSR Bitmap upon vmexits. on, off :since:`10.7.0 (QEMU 7.1)`
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xmm_input Enable XMM Fast Hypercall Input on, off :since:`10.7.0 (QEMU 7.1)`
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=============== ====================================================================== ============================================ =======================================================
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=============== ====================================================================== ============================================ ========================================================================
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:since:`Since 8.0.0`, the hypervisor can be configured further by setting
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the ``mode`` attribute to one of the following values:
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@ -16672,7 +16672,6 @@ virDomainFeaturesHyperVDefParse(virDomainDef *def,
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case VIR_DOMAIN_HYPERV_RESET:
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case VIR_DOMAIN_HYPERV_FREQUENCIES:
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case VIR_DOMAIN_HYPERV_REENLIGHTENMENT:
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case VIR_DOMAIN_HYPERV_TLBFLUSH:
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case VIR_DOMAIN_HYPERV_IPI:
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case VIR_DOMAIN_HYPERV_EVMCS:
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case VIR_DOMAIN_HYPERV_AVIC:
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@ -16680,6 +16679,31 @@ virDomainFeaturesHyperVDefParse(virDomainDef *def,
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case VIR_DOMAIN_HYPERV_XMM_INPUT:
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break;
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case VIR_DOMAIN_HYPERV_TLBFLUSH:
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if (value != VIR_TRISTATE_SWITCH_ON)
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break;
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child = xmlFirstElementChild(node);
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while (child) {
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if (STREQ((const char *)child->name, "direct")) {
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if (virXMLPropTristateSwitch(child, "state", VIR_XML_PROP_REQUIRED,
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&def->hyperv_tlbflush_direct) < 0)
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return -1;
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} else if (STREQ((const char *)child->name, "extended")) {
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if (virXMLPropTristateSwitch(child, "state", VIR_XML_PROP_REQUIRED,
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&def->hyperv_tlbflush_extended) < 0)
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return -1;
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} else {
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virReportError(VIR_ERR_CONFIG_UNSUPPORTED,
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_("unsupported Hyper-V tlbflush feature: %1$s"),
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child->name);
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return -1;
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}
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child = xmlNextElementSibling(child);
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}
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break;
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case VIR_DOMAIN_HYPERV_STIMER:
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if (value != VIR_TRISTATE_SWITCH_ON)
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break;
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@ -3101,6 +3101,8 @@ struct _virDomainDef {
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virDomainXenPassthroughMode xen_passthrough_mode;
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unsigned int hyperv_spinlocks;
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virTristateSwitch hyperv_stimer_direct;
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virTristateSwitch hyperv_tlbflush_direct;
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virTristateSwitch hyperv_tlbflush_extended;
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virGICVersion gic_version;
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virDomainHPTResizing hpt_resizing;
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unsigned long long hpt_maxpagesize; /* Stored in KiB */
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@ -8027,7 +8027,7 @@
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</optional>
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<optional>
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<element name="tlbflush">
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<ref name="featurestate"/>
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<ref name="tlbflush"/>
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</element>
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</optional>
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<optional>
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@ -8075,6 +8075,25 @@
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</interleave>
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</define>
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<!-- Hyper-V tlbflush features -->
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<define name="tlbflush">
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<interleave>
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<optional>
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<ref name="featurestate"/>
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</optional>
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<optional>
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<element name="direct">
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<ref name="featurestate"/>
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</element>
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</optional>
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<optional>
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<element name="extended">
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<ref name="featurestate"/>
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</element>
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</optional>
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</interleave>
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</define>
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<!-- Optional KVM features -->
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<define name="kvm">
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<element name="kvm">
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@ -99,6 +99,8 @@ KVM_FEATURE_DEF(VIR_CPU_x86_HV_REENLIGHTENMENT,
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KVM_FEATURE_DEF(VIR_CPU_x86_HV_STIMER_DIRECT,
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0x40000003, 0x0, 0x00080000);
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KVM_FEATURE_DEF(VIR_CPU_x86_HV_TLBFLUSH_DIRECT,
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0x40000003, 0x0, 0x00004000);
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KVM_FEATURE_DEF(VIR_CPU_x86_HV_TLBFLUSH,
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0x40000004, 0x00000004, 0x0);
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@ -109,6 +111,9 @@ KVM_FEATURE_DEF(VIR_CPU_x86_HV_IPI,
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KVM_FEATURE_DEF(VIR_CPU_x86_HV_EVMCS,
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0x40000004, 0x00004000, 0x0);
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KVM_FEATURE_DEF(VIR_CPU_x86_HV_TLBFLUSH_EXT,
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0x40000004, 0x0, 0x00004000);
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KVM_FEATURE_DEF(VIR_CPU_x86_HV_EMSR_BITMAP,
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0x4000000A, 0x00080000, 0x0);
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static virCPUx86Feature x86_kvm_features[] =
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@ -130,6 +135,8 @@ static virCPUx86Feature x86_kvm_features[] =
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KVM_FEATURE(VIR_CPU_x86_HV_EVMCS),
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KVM_FEATURE(VIR_CPU_x86_HV_STIMER_DIRECT),
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KVM_FEATURE(VIR_CPU_x86_HV_EMSR_BITMAP),
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KVM_FEATURE(VIR_CPU_x86_HV_TLBFLUSH_DIRECT),
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KVM_FEATURE(VIR_CPU_x86_HV_TLBFLUSH_EXT),
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};
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typedef struct _virCPUx86Signature virCPUx86Signature;
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@ -60,6 +60,8 @@ struct _virCPUx86MSR {
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#define VIR_CPU_x86_HV_FREQUENCIES "hv-frequencies"
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#define VIR_CPU_x86_HV_REENLIGHTENMENT "hv-reenlightenment"
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#define VIR_CPU_x86_HV_TLBFLUSH "hv-tlbflush"
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#define VIR_CPU_x86_HV_TLBFLUSH_EXT "hv-tlbflush-ext"
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#define VIR_CPU_x86_HV_TLBFLUSH_DIRECT "hv-tlbflush-direct"
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#define VIR_CPU_x86_HV_IPI "hv-ipi"
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#define VIR_CPU_x86_HV_EVMCS "hv-evmcs"
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#define VIR_CPU_x86_HV_AVIC "hv-avic"
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