Various code cleanup following PR review

This commit is contained in:
Sam Demeulemeester 2022-04-15 17:04:22 +02:00 committed by Sam Demeulemeester
parent eae5dd2796
commit 2a994e7ff5
6 changed files with 49 additions and 44 deletions

View File

@ -66,10 +66,10 @@ static bool timed_update_done = false; // update cycle status
int scroll_message_row;
int display_mode = 0; // RAM Info from: 0 = N/A - 1 = SPD - 2 = IMC
int max_cpu_temp = 0;
display_mode_t display_mode = DISPLAY_MODE_NA;
//------------------------------------------------------------------------------
// Public Functions
//------------------------------------------------------------------------------
@ -176,14 +176,14 @@ void display_cpu_topology(void)
extern int num_enabled_cpus;
int num_cpu_sockets = 1;
if(smp_enabled) {
if (smp_enabled) {
display_threading(num_enabled_cpus, cpu_mode_str[cpu_mode]);
} else {
display_threading_disabled();
}
// If topology failed, assume topology according to APIC
if(cpuid_info.topology.core_count <= 0) {
if (cpuid_info.topology.core_count <= 0) {
cpuid_info.topology.core_count = num_enabled_cpus;
cpuid_info.topology.thread_count = num_enabled_cpus;
@ -194,7 +194,7 @@ void display_cpu_topology(void)
}
// Compute number of sockets according to individual CPU core count
if(num_enabled_cpus > cpuid_info.topology.thread_count &&
if (num_enabled_cpus > cpuid_info.topology.thread_count &&
num_enabled_cpus % cpuid_info.topology.thread_count == 0) {
num_cpu_sockets = num_enabled_cpus / cpuid_info.topology.thread_count;
@ -203,20 +203,20 @@ void display_cpu_topology(void)
// Temporary workaround for Hybrid CPUs.
// TODO: run cpuid on each core to get correct P+E topology
if(cpuid_info.topology.is_hybrid) {
if (cpuid_info.topology.is_hybrid) {
display_cpu_topo_hybrid(cpuid_info.topology.thread_count);
return;
}
// Condensed display for multi-socket motherboard
if(num_cpu_sockets > 1) {
if (num_cpu_sockets > 1) {
display_cpu_topo_multi_socket(num_cpu_sockets,
num_cpu_sockets * cpuid_info.topology.core_count,
num_cpu_sockets * cpuid_info.topology.thread_count);
return;
}
if(cpuid_info.topology.thread_count < 100) {
if (cpuid_info.topology.thread_count < 100) {
display_cpu_topo(cpuid_info.topology.core_count,
cpuid_info.topology.thread_count);
} else {
@ -231,19 +231,19 @@ void post_display_init(void)
print_smbios_startup_info();
print_smbus_startup_info();
if(false) {
if (false) {
// Try to get RAM information from IMC (TODO)
display_spec_mode("IMC: ");
display_spec(ram.freq, ram.type, ram.tCL, ram.tRCD, ram.tRP, ram.tRAS);
display_mode = 2;
display_mode = DISPLAY_MODE_IMC;
} else if (ram.freq > 0 && ram.tCL > 1) {
// If not available, grab max memory specs from SPD
display_spec_mode("RAM: ");
display_spec(ram.freq, ram.type, ram.tCL, ram.tRCD, ram.tRP, ram.tRAS);
display_mode = 1;
display_mode = DISPLAY_MODE_SPD;
} else {
// If nothing avilable, fallback to "Using Core" Display
display_mode = 0;
// If nothing available, fallback to "Using Core" Display
display_mode = DISPLAY_MODE_NA;
}
}
@ -331,7 +331,7 @@ void scroll(void)
scroll_message_row++;
} else {
if (scroll_lock) {
display_footer_message("<Enter> Single step");
display_footer_message("<Enter> Single step ");
}
scroll_wait = true;
do {

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@ -33,6 +33,12 @@
#define ERROR_LIMIT UINT64_C(999999999999)
typedef enum {
DISPLAY_MODE_NA,
DISPLAY_MODE_SPD,
DISPLAY_MODE_IMC
} display_mode_t;
#define display_cpu_model(str) \
prints(0, 30, str)
@ -43,49 +49,49 @@
prints(5, 76, str)
#define display_l1_cache_size(size) \
printf(2, 9, "%6kB", (uintptr_t)(size));
printf(2, 9, "%6kB", (uintptr_t)(size))
#define display_l2_cache_size(size) \
printf(3, 9, "%6kB", (uintptr_t)(size));
printf(3, 9, "%6kB", (uintptr_t)(size))
#define display_l3_cache_size(size) \
printf(4, 9, "%6kB", (uintptr_t)(size));
printf(4, 9, "%6kB", (uintptr_t)(size))
#define display_memory_size(size) \
printf(5, 9, "%6kB", (uintptr_t)(size));
printf(5, 9, "%6kB", (uintptr_t)(size))
#define display_l1_cache_speed(size) \
printf(2, 18, "%S6kB/s", (uintptr_t)(size))
#define display_l1_cache_speed(speed) \
printf(2, 18, "%S6kB/s", (uintptr_t)(speed))
#define display_l2_cache_speed(size) \
printf(3, 18, "%S6kB/s", (uintptr_t)(size))
#define display_l2_cache_speed(speed) \
printf(3, 18, "%S6kB/s", (uintptr_t)(speed))
#define display_l3_cache_speed(size) \
printf(4, 18, "%S6kB/s", (uintptr_t)(size))
#define display_l3_cache_speed(speed) \
printf(4, 18, "%S6kB/s", (uintptr_t)(speed))
#define display_ram_speed(size) \
printf(5, 18, "%S6kB/s", (uintptr_t)(size))
#define display_ram_speed(speed) \
printf(5, 18, "%S6kB/s", (uintptr_t)(speed))
#define display_status(status) \
prints(7, 68, status)
#define display_threading(nb, mode) \
printf(7,31, "%uT (%s)", nb, mode);
printf(7,31, "%uT (%s)", nb, mode)
#define display_threading_disabled() \
prints(7,31, "Disabled");
prints(7,31, "Disabled")
#define display_cpu_topo_hybrid(nb) \
printf(7, 5, "%u Threads (Hybrid)", nb);
#define display_cpu_topo_hybrid(num_threads) \
printf(7, 5, "%u Threads (Hybrid)", num_threads)
#define display_cpu_topo_multi_socket(nbs, nbc, nbt) \
printf(7, 5, "%uS / %uC / %uT", nbs, nbc, nbt);
#define display_cpu_topo_multi_socket(num_sockets, num_cores, num_threads) \
printf(7, 5, "%uS / %uC / %uT", num_sockets, num_cores, num_threads)
#define display_cpu_topo(nbc, nbt) \
printf(7, 5, "%u Cores %u Threads", nbc, nbt);
#define display_cpu_topo( num_cores, num_threads) \
printf(7, 5, "%u Cores %u Threads", num_cores, num_threads)
#define display_cpu_topo_short(nbc, nbt) \
printf(7, 5, "%u Cores (%uT)", nbc, nbt);
#define display_cpu_topo_short( num_cores, num_threads) \
printf(7, 5, "%u Cores (%uT)", num_cores, num_threads)
#define display_spec_mode(mode) \
prints(8,0, mode);
@ -172,7 +178,7 @@
printi(8, 51, count, 0, false, true)
#define display_error_count(count) \
printi(8, 68, count, 0, false, true);
printi(8, 68, count, 0, false, true)
#define clear_message_area() \
{ \
@ -211,7 +217,7 @@
extern int scroll_message_row;
extern int display_mode;
extern display_mode_t display_mode;
void display_init(void);

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@ -346,11 +346,11 @@ static void test_all_windows(int my_cpu)
if (!dummy_run) {
if (parallel_test) {
num_active_cpus = num_enabled_cpus;
if(display_mode == 0) {
if(display_mode == DISPLAY_MODE_NA) {
display_all_active();
}
} else {
if(display_mode == 0) {
if (display_mode == 0) {
display_active_cpu(my_cpu);
}
}

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@ -53,7 +53,7 @@ int printx(int row, int col, uintptr_t value, int length, bool pad, bool left);
* Prints a K<unit> value on screen starting at location (row,col) in a field of
* at least length characters, optionally padding the number with leading zeros,
* optionally left-justifying instead of right-justifying in the field, and
* optionnaly adding a space between number and unit. The value is shown to
* optionally adding a space between number and unit. The value is shown to
* 3 significant figures in the nearest K/M/G/T units. Returns the next column
* after the formatted value.
*/

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@ -8,7 +8,6 @@
#include <stdint.h>
#include "cpuid.h"
#include "display.h"
//------------------------------------------------------------------------------
// Public Variables

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@ -139,7 +139,7 @@ typedef struct {
int is_hybrid;
int ecore_count;
int pcore_count;
} topology_t;
} cpuid_topology_t;
typedef struct {
uint32_t max_cpuid;
@ -152,7 +152,7 @@ typedef struct {
cpuid_brand_string_t brand_id;
cpuid_cache_info_t cache_info;
cpuid_custom_features custom;
topology_t topology;
cpuid_topology_t topology;
} cpuid_info_t;
typedef union {