Improve the IMC reading code by including IMC support files into */memctrl.c: the Makefile becomes simpler, the build becomes faster, the redundant includes can go away, the resulting binary is more optimized.

build32/Makefile

@@ -56,9 +56,6 @@ SYS_OBJS = system/acpi.o \
            system/vmem.o \
            system/xhci.o
 
-IMC_SRCS = $(wildcard ../system/imc/*.c)
-IMC_OBJS = $(subst ../,,$(IMC_SRCS:.c=.o))
-
 LIB_OBJS = lib/barrier.o \
            lib/div64.o \
            lib/print.o \
@@ -84,7 +81,7 @@ APP_OBJS = app/badram.o \
            app/interrupt.o \
            app/main.o
 
-OBJS = boot/startup.o boot/efisetup.o $(SYS_OBJS) $(IMC_OBJS) $(LIB_OBJS) $(TST_OBJS) $(APP_OBJS)
+OBJS = boot/startup.o boot/efisetup.o $(SYS_OBJS) $(LIB_OBJS) $(TST_OBJS) $(APP_OBJS)
 
 all: memtest.bin memtest.efi
 
@@ -98,7 +95,6 @@ debug: check memtest.debug memtest.efi
 
 -include boot/efisetup.d
 -include $(subst .o,.d,$(SYS_OBJS))
--include $(subst .o,.d,$(IMC_OBJS))
 -include $(subst .o,.d,$(LIB_OBJS))
 -include $(subst .o,.d,$(TST_OBJS))
 -include $(subst .o,.d,$(APP_OBJS))
@@ -137,10 +133,6 @@ system/%.o: ../system/%.c system/jedec_id.h
 	@mkdir -p system
 	$(CC) -c $(CFLAGS) $(OPT_SMALL)  $(INC_DIRS) -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)
 
-system/imc/%.o: ../system/imc/%.c
-	@mkdir -p system/imc
-	$(CC) -c $(CFLAGS) $(OPT_SMALL)  $(INC_DIRS) -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)
-
 lib/%.o: ../lib/%.c
 	@mkdir -p lib
 	$(CC) -c $(CFLAGS) $(OPT_SMALL)  $(INC_DIRS) -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)

build64/Makefile

@@ -56,9 +56,6 @@ SYS_OBJS = system/acpi.o \
            system/vmem.o \
            system/xhci.o
 
-IMC_SRCS = $(wildcard ../system/imc/*.c)
-IMC_OBJS = $(subst ../,,$(IMC_SRCS:.c=.o))
-
 LIB_OBJS = lib/barrier.o \
            lib/print.o \
            lib/read.o \
@@ -83,7 +80,7 @@ APP_OBJS = app/badram.o \
            app/interrupt.o \
            app/main.o
 
-OBJS = boot/startup.o boot/efisetup.o $(SYS_OBJS) $(IMC_OBJS) $(LIB_OBJS) $(TST_OBJS) $(APP_OBJS)
+OBJS = boot/startup.o boot/efisetup.o $(SYS_OBJS) $(LIB_OBJS) $(TST_OBJS) $(APP_OBJS)
 
 all: memtest.bin memtest.efi
 
@@ -97,7 +94,6 @@ debug: check memtest.debug memtest.efi
 
 -include boot/efisetup.d
 -include $(subst .o,.d,$(SYS_OBJS))
--include $(subst .o,.d,$(IMC_OBJS))
 -include $(subst .o,.d,$(LIB_OBJS))
 -include $(subst .o,.d,$(TST_OBJS))
 -include $(subst .o,.d,$(APP_OBJS))
@@ -136,10 +132,6 @@ system/%.o: ../system/%.c system/jedec_id.h
 	@mkdir -p system
 	$(CC) -c $(CFLAGS) $(OPT_SMALL)  $(INC_DIRS)  -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)
 
-system/imc/%.o: ../system/imc/%.c
-	@mkdir -p system/imc
-	$(CC) -c $(CFLAGS) $(OPT_SMALL) $(INC_DIRS) -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)
-
 lib/%.o: ../lib/%.c
 	@mkdir -p lib
 	$(CC) -c $(CFLAGS) $(OPT_SMALL)  $(INC_DIRS)  -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)

build64/la64/Makefile

@@ -54,9 +54,6 @@ SYS_OBJS = system/acpi.o \
            system/loongarch/temperature.o \
            system/loongarch/vmem.o
 
-IMC_SRCS = $(wildcard ../../system/imc/loongson/*.c)
-IMC_OBJS = $(subst ../../,,$(IMC_SRCS:.c=.o))
-
 LIB_OBJS = lib/barrier.o \
            lib/print.o \
            lib/read.o \
@@ -81,7 +78,7 @@ APP_OBJS = app/badram.o \
            app/main.o \
            app/loongarch/interrupt.o
 
-OBJS = boot/startup.o boot/efisetup.o $(SYS_OBJS) $(IMC_OBJS) $(LIB_OBJS) $(TST_OBJS) $(APP_OBJS)
+OBJS = boot/startup.o boot/efisetup.o $(SYS_OBJS) $(LIB_OBJS) $(TST_OBJS) $(APP_OBJS)
 
 all: memtest.efi
 
@@ -95,7 +92,6 @@ debug: check memtest.debug memtestloongarch.efi
 
 -include boot/efisetup.d
 -include $(subst .o,.d,$(SYS_OBJS))
--include $(subst .o,.d,$(IMC_OBJS))
 -include $(subst .o,.d,$(LIB_OBJS))
 -include $(subst .o,.d,$(TST_OBJS))
 -include $(subst .o,.d,$(APP_OBJS))
@@ -130,10 +126,6 @@ system/loongarch/%.o: ../../system/loongarch/%.c
 	@mkdir -p system/loongarch/
 	$(CC) -c $(CFLAGS) $(OPT_SMALL)  $(INC_DIRS)  -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)
 
-system/imc/loongson/%.o: ../../system/imc/loongson/%.c
-	@mkdir -p system/imc/loongson/
-	$(CC) -c $(CFLAGS) $(OPT_SMALL) $(INC_DIRS) -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)
-
 lib/%.o: ../../lib/%.c
 	@mkdir -p lib
 	$(CC) -c $(CFLAGS) $(OPT_SMALL)  $(INC_DIRS)  -o $@ $< -MMD -MP -MT $@ -MF $(@:.o=.d)

system/imc/amd_zen.h

@@ -6,18 +6,6 @@
 // Platform-specific code for AMD Zen CPUs
 //
 
-#include "error.h"
-
-#include "config.h"
-#include "cpuinfo.h"
-#include "memctrl.h"
-#include "msr.h"
-#include "pci.h"
-
-#include "imc.h"
-
-#include "display.h" // DEBUG
-
 #define AMD_SMN_UMC_BAR             0x050000
 #define AMD_SMN_UMC_CHB_OFFSET      0x100000
 #define AMD_SMN_UMC_DRAM_ECC_CTRL   AMD_SMN_UMC_BAR + 0x14C
@@ -40,7 +28,7 @@
 #define ECC_RD_EN (1 << 10)
 #define ECC_WR_EN (1 << 0)
 
-void get_imc_config_amd_zen(void)
+static /*__attribute__((noinline))*/ void get_imc_config_amd_zen(void)
 {
     uint32_t smn_reg, offset;
     uint32_t reg_cha, reg_chb;
@@ -136,7 +124,7 @@ void get_imc_config_amd_zen(void)
 #endif
 }
 
-void poll_ecc_amd_zen(bool report)
+static /*__attribute__((noinline)) */ void poll_ecc_amd_zen(bool report)
 {
     uint8_t umc = 0, umc_max = 0;
     uint32_t regh, regl;

system/imc/imc.h

@@ -8,34 +8,34 @@
  */
 
 /* Memory configuration Detection for AMD Zen CPUs */
-void get_imc_config_amd_zen(void);
+static void get_imc_config_amd_zen(void);
 
 /* Memory configuration Detection for Intel Sandy Bridge */
-void get_imc_config_intel_snb(void);
+static void get_imc_config_intel_snb(void);
 
 /* Memory configuration Detection for Intel Haswell */
-void get_imc_config_intel_hsw(void);
+static void get_imc_config_intel_hsw(void);
 
 /* Memory configuration Detection for Intel Skylake */
-void get_imc_config_intel_skl(void);
+static void get_imc_config_intel_skl(void);
 
 /* Memory configuration Detection for Intel Ice Lake */
-void get_imc_config_intel_icl(void);
+static void get_imc_config_intel_icl(void);
 
 /* Memory configuration Detection for Intel Alder Lake */
-void get_imc_config_intel_adl(void);
+static void get_imc_config_intel_adl(void);
 
 /* Memory configuration Detection for Intel Metor Lake */
 void get_imc_config_intel_mtl(void);
 
 /* Memory configuration Detection for Loongson LoongArch DDR4 CPU family */
-void get_imc_config_loongson_ddr4(void);
+static void get_imc_config_loongson_ddr4(void);
 
 /**
  * ECC Polling Code for various IMCs
  */
 
 /* ECC Polling Code for AMD Zen CPUs */
-void poll_ecc_amd_zen(bool report);
+static void poll_ecc_amd_zen(bool report);
 
 #endif /* _IMC_H_ */

system/imc/intel_adl.h

@@ -6,14 +6,6 @@
 // Platform-specific code for Intel Alder Lake CPUs (ADL-S)
 //
 
-#include "cpuinfo.h"
-#include "memctrl.h"
-#include "msr.h"
-#include "pci.h"
-#include "vmem.h"
-
-#include "imc.h"
-
 #define ADL_MMR_BASE_REG_LOW    0x48
 #define ADL_MMR_BASE_REG_HIGH   0x4C
 
@@ -33,7 +25,7 @@
 #define ADL_MMR_MC_BIOS_REG     0x5E04
 #define ADL_MMR_BLCK_REG        0x5F60
 
-void get_imc_config_intel_adl(void)
+static /*__attribute__((noinline))*/ void get_imc_config_intel_adl(void)
 {
     uint64_t mmio_reg;
     uint32_t cha, chb, offset;

system/imc/intel_hsw.h

@@ -6,13 +6,6 @@
 // Platform-specific code for Intel Haswell CPUs (HSW)
 //
 
-#include "cpuinfo.h"
-#include "memctrl.h"
-#include "msr.h"
-#include "pci.h"
-
-#include "imc.h"
-
 #define HSW_MMR_BASE_REG    0x48
 #define HSW_REG_MAIN_CHAN0  0x5004
 #define HSW_REG_MAIN_CHAN1  0x5008
@@ -20,7 +13,7 @@
 #define HSW_REG_TIMING_CAS  0x4014
 #define HSW_REG_TIMING_RCD  0x4000
 
-void get_imc_config_intel_hsw(void)
+static /*__attribute__((noinline))*/ void get_imc_config_intel_hsw(void)
 {
     uint32_t mmio_reg, mch_cfg, offset;
     uint32_t reg0, reg1;

system/imc/intel_icl.h

@@ -6,14 +6,6 @@
 // Platform-specific code for Intel IceLake CPUs (ICL)
 //
 
-#include "cpuinfo.h"
-#include "memctrl.h"
-#include "msr.h"
-#include "pci.h"
-#include "vmem.h"
-
-#include "imc.h"
-
 #define ICL_MMR_BASE_REG_LOW    0x48
 #define ICL_MMR_BASE_REG_HIGH   0x4C
 #define ICL_MMR_TIMINGS         0x4000
@@ -30,7 +22,7 @@
 #define ICL_MMR_BASE_MASK       0x7FFFFF8000
 #define ICL_MMR_MAD_IN_USE_MASK 0x003F003F
 
-void get_imc_config_intel_icl(void)
+static /*__attribute__((noinline))*/ void get_imc_config_intel_icl(void)
 {
     uint64_t mmio_reg;
     uint32_t reg0, reg1, offset;

system/imc/intel_skl.h

@@ -6,14 +6,6 @@
 // Platform-specific code for Intel Skylake CPUs (SKL)
 //
 
-#include "cpuinfo.h"
-#include "memctrl.h"
-#include "msr.h"
-#include "pci.h"
-#include "vmem.h"
-
-#include "imc.h"
-
 #define SKL_MMR_BASE_REG_LOW    0x48
 #define SKL_MMR_BASE_REG_HIGH   0x4C
 #define SKL_MMR_TIMINGS         0x4000
@@ -28,7 +20,7 @@
 #define SKL_MMR_BASE_MASK       0x7FFFFF8000
 #define SKL_MMR_MAD_IN_USE_MASK 0x003F003F
 
-void get_imc_config_intel_skl(void)
+static /*__attribute__((noinline))*/ void get_imc_config_intel_skl(void)
 {
     uint64_t mmio_reg;
     uint32_t reg0, reg1, offset;

system/imc/intel_snb.h

@@ -6,20 +6,13 @@
 // Platform-specific code for Intel Sandy Bridge CPUs (SNB)
 //
 
-#include "cpuinfo.h"
-#include "memctrl.h"
-#include "msr.h"
-#include "pci.h"
-
-#include "imc.h"
-
 #define SNB_MMR_BASE_REG    0x48
 #define SNB_REG_MAIN_CHAN0  0x5004
 #define SNB_REG_MAIN_CHAN1  0x5008
 #define SNB_REG_MCH_CFG     0x5E04
 #define SNB_REG_TIMING      0x4000
 
-void get_imc_config_intel_snb(void)
+static /*__attribute__((noinline))*/ void get_imc_config_intel_snb(void)
 {
     uint32_t mmio_reg, offset;
     uint32_t mch_cfg, reg0, reg1;

system/imc/loongson/loongson_la.h

@@ -18,7 +18,7 @@
 #define MC_CONF_ADDRESS   0x800000000FF00000ULL
 #define CHIP_CONF_ADDRESS 0x800000001FE00000ULL
 
-void read_imc_sequence(void)
+static void read_imc_sequence(void)
 {
     imc.tCL     = (uint16_t)read8((uint8_t *)(MC_CONF_ADDRESS + 0x1060));
     imc.tCL_dec = 0;
@@ -27,7 +27,7 @@ void read_imc_sequence(void)
     imc.tRAS    = (uint16_t)read8((uint8_t *)(MC_CONF_ADDRESS + 0x1040));
 }
 
-bool read_imc_info(uint8_t node_num, uint8_t max_mc, bool route_flag)
+static bool read_imc_info(uint8_t node_num, uint8_t max_mc, bool route_flag)
 {
     uint64_t fun_val;
     uint8_t  i, j;
@@ -119,7 +119,7 @@ bool read_imc_info(uint8_t node_num, uint8_t max_mc, bool route_flag)
     return ret;
 }
 
-void get_imc_config_loongson_ddr4(void)
+static void /*__attribute__((noinline))*/ get_imc_config_loongson_ddr4(void)
 {
     uint32_t val;
     uint16_t refc, loopc, div, div_mode, ref_clk;

system/loongarch/memctrl.c

@@ -14,6 +14,7 @@
 
 #include "memctrl.h"
 #include "imc/imc.h"
+#include "imc/loongson/loongson_la.h"
 
 #include "display.h"
 

system/memctrl.c

@@ -8,11 +8,23 @@
 
 #include <stdbool.h>
 
-#include "config.h"
+#include "error.h"
-#include "cpuinfo.h"
 
+#include "config.h"
+
+#include "cpuinfo.h"
 #include "memctrl.h"
+#include "msr.h"
+#include "pci.h"
+#include "vmem.h"
+
 #include "imc/imc.h"
+#include "imc/amd_zen.h"
+#include "imc/intel_snb.h"
+#include "imc/intel_hsw.h"
+#include "imc/intel_skl.h"
+#include "imc/intel_icl.h"
+#include "imc/intel_adl.h"
 
 #include "display.h"