From a47b2bc05382a1204322dc91c74654445f05b200 Mon Sep 17 00:00:00 2001 From: Sam Demeulemeester Date: Sun, 20 Apr 2025 19:16:51 +0200 Subject: [PATCH] Fix DDR5 SPD parsing issue for XMP 3.0 frequency On DDR5, limit XMP profile parsing to 2 to avoid conflict between XMP and EXPO Add a check to skip very low tCK values --- system/spd.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/system/spd.c b/system/spd.c index f0f7630..f53c4dd 100644 --- a/system/spd.c +++ b/system/spd.c @@ -202,14 +202,14 @@ static void parse_spd_ddr5(spd_info *spdi, uint8_t slot_idx) if (spdi->XMP == 3) { // XMP 3.0 (enumerate all profiles to find the fastest) tCK = 0; - for (int offset = 0; offset < 3*64; offset += 64) { + for (int offset = 0; offset < 2*64; offset += 64) { tCKtmp = get_spd(slot_idx, 710 + offset) << 8 | get_spd(slot_idx, 709 + offset); - if (tCKtmp != 0 && (tCK == 0 || tCKtmp < tCK)) { - xmp_offset = offset; - tCK = tCKtmp; - } + if (tCKtmp == 0 || tCKtmp < 100 || (tCK != 0 && tCKtmp >= tCK)) continue; + + xmp_offset = offset; + tCK = tCKtmp; } } else { // JEDEC