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Move various function in display.h. Finalize wording on CPU Topology
This commit is contained in:
Sam Demeulemeester
Sam Demeulemeester
parent
96a9021c93
commit
bd5d3e865f
@ -95,7 +95,7 @@ void display_init(void)
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prints(4, 0, "L3 Cache: N/A | Testing: ");
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prints(5, 0, "Memory : N/A | Pattern: ");
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prints(6, 0, "--------------------------------------------------------------------------------");
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prints(7, 0, "CPU: SMP: N/A | Time: Status: Init. ");
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prints(7, 0, "CPU: SMP: N/A | Time: Status: Init. ");
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prints(8, 0, "Using: | Pass: Errors: ");
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prints(9, 0, "--------------------------------------------------------------------------------");
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@ -137,6 +137,11 @@ void display_init(void)
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if (clks_per_msec) {
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display_cpu_clk((int)(clks_per_msec / 1000));
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}
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if (cpuid_info.flags.lm) {
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display_cpu_addr_mode("X64");
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} else if (cpuid_info.flags.pae) {
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display_cpu_addr_mode("PAE");
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}
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if (l1_cache) {
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display_l1_cache_size(l1_cache);
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}
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@ -172,9 +177,9 @@ void display_cpu_topology(void)
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int num_cpu_sockets = 1;
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if(smp_enabled) {
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printf(7,30, "%uT (%s)", num_enabled_cpus, cpu_mode_str[cpu_mode]);
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display_threading(num_enabled_cpus, cpu_mode_str[cpu_mode]);
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} else {
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prints(7,30, "Disabled");
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display_threading_disabled();
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}
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// If topology failed, assume topology according to APIC
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@ -195,24 +200,30 @@ void display_cpu_topology(void)
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num_cpu_sockets = num_enabled_cpus / cpuid_info.topology.thread_count;
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}
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// Temporary workaround for Hybrid CPUs.
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// TODO: run cpuid on each core to get correct P+E topology
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if(cpuid_info.topology.is_hybrid) {
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printf(7, 5, "%u Threads (%s)", cpuid_info.topology.thread_count,
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cpuid_info.flags.lm ? "X64" : "PAE");
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display_cpu_topo_hybrid(cpuid_info.topology.thread_count);
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return;
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}
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if(num_cpu_sockets < 2) {
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printf(7, 5, "%uC/%uT (%s)", cpuid_info.topology.core_count,
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cpuid_info.topology.thread_count,
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cpuid_info.flags.lm ? "X64" : "PAE");
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} else {
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printf(7, 5, "%uS/%uC/%uT (%s)", num_cpu_sockets,
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num_cpu_sockets * cpuid_info.topology.core_count,
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num_cpu_sockets * cpuid_info.topology.thread_count,
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cpuid_info.flags.lm ? "X64" : "PAE");
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// Condensed display for multi-socket motherboard
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if(num_cpu_sockets > 1) {
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display_cpu_topo_multi_socket(num_cpu_sockets,
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num_cpu_sockets * cpuid_info.topology.core_count,
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num_cpu_sockets * cpuid_info.topology.thread_count);
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return;
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}
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if(cpuid_info.topology.thread_count < 100) {
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display_cpu_topo(cpuid_info.topology.core_count,
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cpuid_info.topology.thread_count);
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} else {
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display_cpu_topo_short(cpuid_info.topology.core_count,
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cpuid_info.topology.thread_count);
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}
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}
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void post_display_init(void)
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@ -222,23 +233,13 @@ void post_display_init(void)
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if(false) {
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// Try to get RAM information from IMC (TODO)
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printf(8,0, "IMC: %uMHz (%s-%u) CAS %u-%u-%u-%u", ram.freq / 2
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, ram.type
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, ram.freq
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, ram.tCL
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, ram.tRCD
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, ram.tRP
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, ram.tRAS);
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display_spec_mode("IMC: ");
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display_spec(ram.freq, ram.type, ram.tCL, ram.tRCD, ram.tRP, ram.tRAS);
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display_mode = 2;
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} else if (ram.freq > 0 && ram.tCL > 1) {
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// If not available, grab max memory specs from SPD
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printf(8,0, "RAM: %uMHz (%s-%u) CAS %u-%u-%u-%u", ram.freq / 2
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, ram.type
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, ram.freq
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, ram.tCL
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, ram.tRCD
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, ram.tRP
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, ram.tRAS);
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display_spec_mode("RAM: ");
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display_spec(ram.freq, ram.type, ram.tCL, ram.tRCD, ram.tRP, ram.tRAS);
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display_mode = 1;
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} else {
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// If nothing avilable, fallback to "Using Core" Display
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@ -9,6 +9,7 @@
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*
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*//*
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* Copyright (C) 2020-2022 Martin Whitaker.
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* Copyright (C) 2004-2022 Sam Demeulemeester.
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*/
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#include <stdbool.h>
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@ -38,6 +39,9 @@
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#define display_cpu_clk(freq) \
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printf(1, 10, "%iMHz", freq)
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#define display_cpu_addr_mode(str) \
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prints(5, 76, str)
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#define display_l1_cache_size(size) \
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printf(2, 9, "%6kB", (uintptr_t)(size));
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@ -65,6 +69,31 @@
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#define display_status(status) \
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prints(7, 68, status)
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#define display_threading(nb, mode) \
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printf(7,31, "%uT (%s)", nb, mode);
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#define display_threading_disabled() \
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prints(7,31, "Disabled");
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#define display_cpu_topo_hybrid(nb) \
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printf(7, 5, "%u Threads (Hybrid)", nb);
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#define display_cpu_topo_multi_socket(nbs, nbc, nbt) \
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printf(7, 5, "%uS / %uC / %uT", nbs, nbc, nbt);
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#define display_cpu_topo(nbc, nbt) \
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printf(7, 5, "%u Cores %u Threads", nbc, nbt);
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#define display_cpu_topo_short(nbc, nbt) \
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printf(7, 5, "%u Cores (%uT)", nbc, nbt);
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#define display_spec_mode(mode) \
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prints(8,0, mode);
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#define display_spec(freq, type, cl, rcd, rp, ras) \
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printf(8,5, "%uMHz (%s-%u) CAS %u-%u-%u-%u", \
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freq / 2, type, freq, cl, rcd, rp, ras);
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#define display_dmi_mb(sys_ma, sys_sku) \
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dmicol = prints(23, dmicol, sys_man); \
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prints(23, dmicol + 1, sys_sku);
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@ -106,7 +135,7 @@
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#define display_test_addresses(pb, pe, total) \
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{ \
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clear_screen_region(4, 39, 4, SCREEN_WIDTH - 1); \
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printf(4, 39, "%kB - %kB %kB of %kB", pb, pe, (pe) - (pb), total); \
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printf(4, 39, "%kB - %kB [%kB of %kB]", pb, pe, (pe) - (pb), total); \
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}
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#define display_test_stage_description(...) \
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