7 Commits

Author	SHA1	Message	Date
Sam Demeulemeester	03a5222ee2	Add support for Zen4/AM5 DDR5 SPD	2022-09-09 18:09:13 +02:00
Sam Demeulemeester	4a20637f8e	Add support for AMD Cezanne APU (Ryzen 5000G) #21	2022-04-01 18:55:43 +02:00
Sam Demeulemeester	bd5e6f3c6b	Bring back the cache & memory benchmark feature (preliminary)	2022-03-24 21:49:56 +01:00
Sam DEMEULEMEESTER	6e57ffec34	Added a lot of modern IMC from Intel's BDW (5th gen) to RPL (13th gen)	2022-03-24 21:49:56 +01:00
Martin Whitaker	f8b82eb0bd	Exclude copyright notices from Doxygen file descriptions.	2022-02-19 19:56:55 +00:00
Martin Whitaker	76adad2fe6	Add ability to generate internal API documentation using Doxygen.	2022-02-19 16:17:40 +00:00
Martin Whitaker	fbd3376668	Initial commit.	2020-05-24 21:30:55 +01:00