Sam Demeulemeester
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67cb78f4e5
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Add support for AMD/ATI Southbridge (SB600->SB900)
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2022-05-22 18:33:49 +02:00 |
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Sam Demeulemeester
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3bc72c1fd4
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Remove unused strings and useless smb_idx argument in get_spd()
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2022-05-20 19:10:00 +02:00 |
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Sam Demeulemeester
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e0cee8e2c3
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Add SMBUS support for Intel 82371AB (PIIX4) and AMD Bulldozer/Kabini (SB800/900)
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2022-05-20 18:07:22 +02:00 |
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Lionel Debroux
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caa07482a0
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Reorganize struct spd_infos for better alignment (#2), fix left shifts of count > width of type, fix whitespace, improve comments.
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2022-05-19 18:45:13 +02:00 |
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Sam Demeulemeester
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c2d033b4b4
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Correct tCL detection on SDRAM
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2022-05-19 17:16:13 +02:00 |
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debrouxl
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c1d0c17f23
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Add SPD decoding for SDRAM.
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2022-05-19 15:07:09 +02:00 |
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Sam Demeulemeester
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37edb221d7
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Importing minor bug fixes in smbus.c from delayed PR #44
Co-authored-by: 01e3 <01e3@ans.pl>
Co-authored-by: debrouxl <lionel_debroux@yahoo.fr>
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2022-05-19 12:01:05 +02:00 |
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Sam Demeulemeester
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2a7631daab
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Enumerate all XMP 3.0 profiles on DDR5 to find the fastest. Solve a rounding issue with DDR5 timings
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2022-04-22 00:49:54 +02:00 |
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Sam Demeulemeester
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be9502ac01
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Add detection for Rambus RDRAM modules & support for ICH1/2/3
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2022-04-16 18:36:58 +02:00 |
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Sam Demeulemeester
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6fca9bedc9
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Rework Line 9. Add DDR1->DDR5 Timing Detection to display on this line
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2022-04-16 13:31:28 +02:00 |
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Sam Demeulemeester
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43302bf193
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Add SPD decoding for DDR memory modules
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2022-04-06 23:55:38 +02:00 |
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Sam Demeulemeester
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4a20637f8e
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Add support for AMD Cezanne APU (Ryzen 5000G) #21
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2022-04-01 18:55:43 +02:00 |
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Sam Demeulemeester
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a4f1ba37b3
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Add support for AMD Ryzen FCH (#21)
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2022-03-27 23:47:57 +02:00 |
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Sam Demeulemeester
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88017f007f
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Add preliminary support for XMP3 on DDR5 (#23). Fix an issue with wrong SPD values on DDR5 ES modules
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2022-03-25 00:33:42 +01:00 |
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Sam Demeulemeester
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aaa2061aec
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Fix an issue with DDR5 capacity detection
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2022-03-24 21:49:56 +01:00 |
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Sam Demeulemeester
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b22c032b5a
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Add support for DDR5 in smbus.c. Major rework of various related functions (#2)
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2022-03-24 21:49:56 +01:00 |
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Sam Demeulemeester
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fa206bb865
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Added DDR2 SPD decoding (#2)
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2022-03-24 21:49:56 +01:00 |
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Sam DEMEULEMEESTER
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eaf1cbeebb
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Minor cosmectic changes on smbus.c & Added Amazon JEP106 per AWS team request
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2022-03-24 21:49:56 +01:00 |
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Sam DEMEULEMEESTER
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f9690813ca
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New code base for SMBUS / SPD access (#2) - WIP
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2022-03-24 21:49:56 +01:00 |
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Sam DEMEULEMEESTER
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2266151fe6
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Early SMBUS functions (#2) & EFI Reset (#17)
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2022-03-24 21:49:56 +01:00 |
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