mirror of
https://github.com/memtest86plus/memtest86plus.git
synced 2024-11-27 01:50:20 -06:00
71c7bdfc00
TODO:
* selective NX enablement on pd0, pd1 and pd3.
Unconditional NX on the whole pd3 makes memtest86+ reboot in a QEMU-emulated computer.
* if supported on all x86_64 CPUs, simply enable long mode and NX simultaneously ? A real K8 dual-core processor didn't seem to hate it, at least.
* startup code: NX enablement for x86, on capable computers (CPUID 0x80000001, edx bit 20).
* set the appropriate flag in the headers.
655 lines
12 KiB
ArmAsm
655 lines
12 KiB
ArmAsm
// SPDX-License-Identifier: GPL-2.0
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//
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// startup64.S contains the 64-bit startup code for both the BSP and APs.
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// It initialises stacks, memory management, and exception handling, clears
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// the BSS, completes relocation, and finally calls the main application.
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// It supports both the 32-bit and 64-bit Linux boot protocols and EFI boot
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// for the first boot of the BSP.
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//
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// Copyright (C) 2020-2022 Martin Whitaker.
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//
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// Derived from memtest86+ head.S:
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//
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// linux/boot/head.S
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// Copyright (C) 1991, 1992 Linus Torvalds
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// 1-Jan-96 Modified by Chris Brady for use as a boot/loader for MemTest-86.
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// Set up the memory management for flat non-paged linear addressing.
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// 17 May 2004 : Added X86_PWRCAP for AMD64 (Memtest86+ - Samuel D.)
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#define __ASSEMBLY__
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#include "boot.h"
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#define NUM_INT_VEC 20
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.text
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.code32
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# The Linux 32-bit boot entry point.
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.globl startup32
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startup32:
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cld
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cli
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# Get the load address.
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movl 0x214(%esi), %ebx # bootparams.code32_start
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# Save the boot params pointer.
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movl %esi, (boot_params_addr - startup32)(%ebx)
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# Use the startup stack until we pick the correct one.
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leal (startup_stack_top - startup32)(%ebx), %esp
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# Initialise the pml4 and pdp tables.
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leal (pml4 - startup32)(%ebx), %ecx
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leal (pdp - startup32)(%ebx), %edx
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movl %edx, %eax
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addl $0x3, %eax
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movl %eax, 0(%ecx)
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leal (pd0 - startup32)(%ebx), %eax
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addl $0x3, %eax
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movl %eax, 0(%edx)
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leal (pd1 - startup32)(%ebx), %eax
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addl $0x3, %eax
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movl %eax, 8(%edx)
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leal (pd2 - startup32)(%ebx), %eax
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addl $0x3, %eax
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movl %eax, 16(%edx)
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leal (pd3 - startup32)(%ebx), %eax
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addl $0x3, %eax
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movl %eax, 24(%edx)
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# Set the page directory base address.
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movl %ecx, %cr3
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# Enable PAE.
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movl %cr4, %eax
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orb $0x20, %al
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movl %eax, %cr4
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# Enable long mode.
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movl $0xc0000080, %ecx
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rdmsr
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orb $0x01, %ah
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wrmsr
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# Enable paging and protection.
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movl %cr0, %eax
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orl $0x80000001, %eax
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movl %eax, %cr0
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# Initialise the 64-bit GDT descriptor.
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leal (gdt - startup32)(%ebx), %eax
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movl %eax, 2 + (gdt_descr - startup32)(%ebx)
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# Load the GDT and enter long mode.
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lgdt (gdt_descr - startup32)(%ebx)
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leal (startup - startup32)(%ebx), %eax
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movw $KERNEL_CS, -2(%esp)
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movl %eax, -6(%esp)
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ljmp *-6(%esp)
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.code64
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# The EFI PE32+ boot entry point.
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.org 0x1e0
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.globl efi_boot
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efi_boot:
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movq %rcx, %rdi # the EFI image handle
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movq %rdx, %rsi # the EFI system table pointer
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movq $0, %rdx # the boot params pointer (0 = not yet allocated)
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jmp efi_handover
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# The Linux 64-bit boot entry point.
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.org 0x200
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.globl startup64
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startup64:
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cld
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cli
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# Save the boot params pointer.
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movq %rsi, boot_params_addr(%rip)
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jmp startup
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# The Linux 64-bit EFI handover point.
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.org 0x210
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.globl efi_handover
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efi_handover:
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andq $~0xf, %rsp
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call efi_setup
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# Save the boot params pointer.
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movq %rax, boot_params_addr(%rip)
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# The 64-bit entry point for AP boot and for restart after relocation.
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.globl startup
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startup:
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# Some of the startup actions are not thread safe. Use a mutex
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# to protect this section of code.
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0: lock btsl $0, startup_mutex(%rip)
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jc 0b
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# Use the startup stack until we pick the correct one.
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leaq startup_stack_top(%rip), %rsp
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# Pick the correct stack.
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xorq %rax, %rax
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call smp_my_cpu_num
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movl $AP_STACK_SIZE, %edx
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mul %edx
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addq $(BSP_STACK_SIZE - LOCALS_SIZE), %rax
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leaq _stacks(%rip), %rsp
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addq %rax, %rsp
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# Enable NX.
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movl $0xc0000080, %ecx
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rdmsr
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orb $0x08, %ah
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wrmsr
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# Initialise the pml4 and pdp tables.
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leaq pml4(%rip), %rcx
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leaq pdp(%rip), %rdx
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movq %rdx, %rax
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addq $0x3, %rax
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movq %rax, 0(%rcx)
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leaq pd0(%rip), %rax
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addq $0x3, %rax
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movq %rax, 0(%rdx)
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leaq pd1(%rip), %rax
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addq $0x3, %rax
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movq %rax, 8(%rdx)
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leaq pd2(%rip), %rax
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addq $0x3, %rax
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movq %rax, 16(%rdx)
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leaq pd3(%rip), %rax
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addq $0x3, %rax
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movq %rax, 24(%rdx)
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# Set the page directory base address.
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movq %rcx, %cr3
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# Initialise the GDT descriptor.
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leaq gdt(%rip), %rax
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movq %rax, 2 + gdt_descr(%rip)
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# Load the GDT and the segment registers.
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lgdt gdt_descr(%rip)
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leaq flush(%rip), %rax
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movw $KERNEL_CS, -2(%rsp)
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movl %eax, -6(%rsp)
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ljmp *-6(%rsp)
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flush: movw $KERNEL_DS, %ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %fs
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movw %ax, %gs
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movw %ax, %ss
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# Initialise the IDT.
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leaq idt(%rip), %rdi
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leaq vec0(%rip), %rsi
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movw $NUM_INT_VEC, %cx
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0: movq %rsi, %rdx
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movl $(KERNEL_CS << 16), %eax
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movw %dx, %ax # selector = 0x0010 = cs
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movw $0x8E00, %dx # interrupt gate - dpl=0, present
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movl %eax, (%rdi)
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movl %edx, 4(%rdi)
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shrq $32, %rdx
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movl %edx, 8(%rdi)
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movl $0, 12(%rdi)
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addq $(vec1-vec0), %rsi
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addq $16, %rdi
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dec %cx
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jnz 0b
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# Initialise the IDT descriptor.
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leaq idt(%rip), %rax
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movq %rax, 2 + idt_descr(%rip)
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# Load the IDT.
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lidt idt_descr(%rip)
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# Zero the BSS (if first boot).
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cmpl $1, first_boot(%rip)
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jne 1f
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xorq %rax, %rax
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leaq _bss(%rip), %rdi
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leaq _end(%rip), %rcx
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subq %rdi, %rcx
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0: movq %rax, (%rdi)
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addq $8, %rdi
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subq $8, %rcx
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jnz 0b
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movl $0, first_boot(%rip)
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1:
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# Initialise the FPU.
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finit
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#if 0
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# Enable SSE.
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movq %cr0, %rax
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andb $0xfb, %al # clear coprocessor emulation bit
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orb $0x02, %al # set coprocessor monitoring bit
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mov %rax, %cr0
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movq %cr4, %rax
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orw $0x0600, %ax # set OSFXSR and OSXMMEXCPT
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movq %rax, %cr4
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#endif
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# Call the dynamic linker to fix up the addresses in the GOT.
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call reloc
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# Release the startup mutex.
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movl $0, startup_mutex(%rip)
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# Run the application.
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call main
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# In case we return, simulate an exception.
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pushfq
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xorq %rax, %rax
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movw %cs, %ax
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pushq %rax
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call 0f
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0: pushq $0 # error code
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pushq $257 # vector
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jmp int_handler
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# Individual interrupt vector handlers. These need to be spaced equally, to
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# allow the IDT initialisation loop above to work, so we use noops to pad out
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# where required.
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vec0:
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pushq $0 # error code
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pushq $0 # vector
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jmp int_handler
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vec1:
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pushq $0 # error code
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pushq $1 # vector
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jmp int_handler
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vec2:
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pushq $0 # error code
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pushq $2 # vector
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jmp int_handler
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vec3:
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pushq $0 # error code
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pushq $3 # vector
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jmp int_handler
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vec4:
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pushq $0 # error code
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pushq $4 # vector
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jmp int_handler
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vec5:
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pushq $0 # error code
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pushq $5 # vector
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jmp int_handler
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vec6:
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pushq $0 # error code
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pushq $6 # vector
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jmp int_handler
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vec7:
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pushq $0 # error code
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pushq $7 # vector
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jmp int_handler
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vec8:
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nop;nop # error code already provided
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pushq $8 # vector
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jmp int_handler
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vec9:
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pushq $0 # error code
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pushq $9 # vector
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jmp int_handler
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vec10:
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nop;nop # error code already provided
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pushq $10 # vector
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jmp int_handler
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vec11:
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nop;nop # error code already provided
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pushq $11 # vector
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jmp int_handler
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vec12:
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nop;nop # error code already provided
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pushq $12 # vector
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jmp int_handler
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vec13:
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nop;nop # error code already provided
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pushq $13 # vector
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jmp int_handler
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vec14:
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nop;nop # error code already provided
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pushq $14 # vector
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jmp int_handler
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vec15:
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pushq $0 # error code
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pushq $15 # vector
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jmp int_handler
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vec16:
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pushq $0 # error code
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pushq $16 # vector
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jmp int_handler
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vec17:
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nop;nop # error code
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pushq $17 # vector
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jmp int_handler
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vec18:
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pushq $0 # error code
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pushq $18 # vector
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jmp int_handler
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vec19:
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pushq $0 # error code
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pushq $19 # vector
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jmp int_handler
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# The common interrupt handler code. Pass the register state to the application
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# interrupt handler. On entry this expects the stack to contain:
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#
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# rsp+30 ss
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# rsp+28 rsp
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# rsp+20 rflags
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# rsp+18 cs
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# rsp+10 rip
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# rsp+08 error code
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# rsp+00 vector number
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#
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# It adds the additional state expected by the application to the bottom of the
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# stack frame.
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int_handler:
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pushq %rbp
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pushq %rsi
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pushq %rdi
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pushq %rdx
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pushq %rcx
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pushq %rbx
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pushq %rax
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xorq %rax, %rax
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movw %ss, %ax
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pushq %rax
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movw %es, %ax
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pushq %rax
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movw %ds, %ax
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pushq %rax
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movq %rsp, %rdi # pointer to trap regs struct on the stack
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cld
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call interrupt
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addq $24, %rsp
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popq %rax
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popq %rbx
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popq %rcx
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popq %rdx
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popq %rdi
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popq %rsi
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popq %rbp
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addq $16, %rsp # discard the vector number and error code
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iretq
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# The interrupt descriptor table.
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.align 4
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.word 0 # for alignment
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idt_descr:
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.word idt_end - idt - 1 # size
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.quad 0 # addr: filled in at run time
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idt:
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.fill NUM_INT_VEC*2, 8, 0 # filled in at run time
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idt_end:
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# The global descriptor table.
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.word 0 # for alignment
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gdt_descr:
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.word gdt_end - gdt - 1 # size
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.quad 0 # addr: filled in at run time
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.align 4
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.globl gdt
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gdt:
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.quad 0x0000000000000000 # NULL descriptor
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.quad 0x0000000000000000 # not used
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.quad 0x00209a0000000000 # 0x10 64-bit code at 0x000000
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.quad 0x0000920000000000 # 0x18 64-bit data at 0x000000
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.globl gdt_end
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gdt_end:
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.data
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.macro ptes64 start, flags, count=64
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.quad \start + 0x0000000 + \flags
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.quad \start + 0x0200000 + \flags
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.quad \start + 0x0400000 + \flags
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.quad \start + 0x0600000 + \flags
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.quad \start + 0x0800000 + \flags
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.quad \start + 0x0A00000 + \flags
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.quad \start + 0x0C00000 + \flags
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.quad \start + 0x0E00000 + \flags
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.if \count-1
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ptes64 "(\start+0x01000000)", \flags, \count-1
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.endif
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.endm
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.macro maxdepth depth=1
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.if \depth-1
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maxdepth \depth-1
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.endif
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.endm
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maxdepth
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# The level 4 page map table.
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.align 4096
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.globl pml4
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pml4:
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.quad 0 # filled in at run time
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# Page Directory Pointer Table:
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# 4 Entries, pointing to the Page Directory Tables.
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.align 4096
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.globl pdp
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pdp:
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.quad 0 # filled in at run time
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.quad 0 # filled in at run time
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.quad 0 # filled in at run time
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.quad 0 # filled in at run time
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# Page Directory Tables:
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# There are 4 tables. The first two map the first 2 GB of memory. The third
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# is used with PAE to map the rest of memory in 1 GB segments. The fourth is
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# reserved for mapping the video frame buffer. We use 2 MB pages so only the
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# Page Directory Table is used (no page tables).
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.align 4096
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.globl pd0
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pd0:
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ptes64 0x0000000000000000,0x0000000000000083
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.align 4096
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.globl pd1
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pd1:
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ptes64 0x0000000040000000,0x0000000000000083
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.align 4096
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.globl pd2
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pd2:
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ptes64 0x0000000080000000,0x8000000000000083
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.align 4096
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.globl pd3
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pd3:
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ptes64 0x00000000C0000000,0x0000000000000083
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.previous
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# ap_trampoline is the entry point for CPUs other than the bootstrap
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# CPU (BSP). It gets copied to a page in low memory, to enable the APs
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# to boot when the main program has been loaded in high memory.
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.code16
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.align 4
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.globl ap_trampoline
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ap_trampoline:
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movw %cs, %ax
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movw %ax, %ds
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# Patch the jump address.
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movl (ap_startup_addr - ap_trampoline), %ebx
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movl %ebx, (ap_jump - ap_trampoline + 2)
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# Patch and load the GDT descriptor. It should point to the main
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# GDT descriptor, which has already been initialised by the BSP.
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movl %ebx, %eax
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addl $(gdt - startup), %eax
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movl %eax, (ap_gdt_descr - ap_trampoline + 2)
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data32 lgdt ap_gdt_descr - ap_trampoline
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# Set the page directory base address.
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movl %ebx, %eax
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addl $(pml4 - startup), %eax
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movl %eax, %cr3
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# Enable PAE.
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|
|
|
movl %cr4, %eax
|
|
orb $0x20, %al
|
|
movl %eax, %cr4
|
|
|
|
# Enable long mode.
|
|
|
|
movl $0xc0000080, %ecx
|
|
rdmsr
|
|
orb $0x01, %ah
|
|
wrmsr
|
|
|
|
# Enable paging and protection.
|
|
|
|
movl %cr0, %eax
|
|
orl $0x80000001, %eax
|
|
movl %eax, %cr0
|
|
|
|
# Enable NX.
|
|
|
|
movl $0xc0000080, %ecx
|
|
rdmsr
|
|
orb $0x08, %ah
|
|
wrmsr
|
|
|
|
# Jump to the 64-bit entry point.
|
|
ap_jump:
|
|
data32 ljmp $KERNEL_CS, $0
|
|
|
|
.align 4
|
|
.word 0 # for alignment
|
|
ap_gdt_descr:
|
|
.word gdt_end - gdt - 1 # gdt limit
|
|
.long 0 # gdt base - filled in at run time
|
|
|
|
.globl ap_startup_addr
|
|
ap_startup_addr:
|
|
.long 0 # filled in at run time
|
|
|
|
.globl ap_trampoline_end
|
|
ap_trampoline_end:
|
|
|
|
.previous
|
|
|
|
# Variables.
|
|
|
|
.data
|
|
.align 4
|
|
|
|
.globl boot_params_addr
|
|
boot_params_addr:
|
|
.quad 0
|
|
|
|
startup_mutex:
|
|
.long 0
|
|
|
|
first_boot:
|
|
.long 1
|
|
|
|
.previous
|
|
|
|
# Startup stack.
|
|
|
|
.bss
|
|
.align 16
|
|
|
|
startup_stack_base:
|
|
. = . + 64
|
|
startup_stack_top:
|
|
|
|
.previous
|
|
|
|
# Main stack area.
|
|
|
|
.section ".stacks", "aw", @nobits
|
|
.align 16
|
|
|
|
. = . + STACKS_SIZE
|
|
|
|
.previous
|