Sam Demeulemeester f34a85ce07 Add support for Intel MTL & ARL CPUs (#441) ... * Add CPUID detection for MTL & ARL CPUs * Add support for ARL SMBus Controler Add PCI Device polling on Bus 0x80 (instead of fixed 0x00) Solve issue with DDR5 SPD Bank switching when SPD Write is disabled (using Proc Call) * Add Live Freq/Timings IMC Polling for Intel MTL & ADL CPUs * Correct K8 Rev G detection Fix #361 (PR hijacking)		2024-09-30 13:38:13 +02:00
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loongson	Add LoongArch support (#410)	2024-08-30 13:38:46 +02:00
amd_zen.c	Preliminary ECC support for AMD Zen CPUs (#353)	2023-11-29 12:53:05 +01:00
imc.h	Add support for Intel MTL & ARL CPUs (#441)	2024-09-30 13:38:13 +02:00
intel_adl.c	Add Memory Controller Registers polling to get current DRAM Timings/Frequency (#306)	2023-05-12 15:33:28 +02:00
intel_hsw.c	Add Memory Controller Registers polling to get current DRAM Timings/Frequency (#306)	2023-05-12 15:33:28 +02:00
intel_icl.c	Add Memory Controller Registers polling to get current DRAM Timings/Frequency (#306)	2023-05-12 15:33:28 +02:00
intel_mtl.c	Add support for Intel MTL & ARL CPUs (#441)	2024-09-30 13:38:13 +02:00
intel_skl.c	Add Memory Controller Registers polling to get current DRAM Timings/Frequency (#306)	2023-05-12 15:33:28 +02:00
intel_snb.c	Add Memory Controller Registers polling to get current DRAM Timings/Frequency (#306)	2023-05-12 15:33:28 +02:00