Lionel Debroux e16118505f WIP BROKEN Add SIMD tests for x86 & x86-64: MMX, SSE, SSE2, AVX ( #98 ).		2025-02-06 23:05:31 +01:00
..
loongarch	Add LoongArch support (#410)	2024-08-30 13:38:46 +02:00
badram.c	Improve BadRAM pattern collection and add more condensed error reporting modes (#454)	2024-11-11 23:57:21 +01:00
badram.h	Improve BadRAM pattern collection and add more condensed error reporting modes (#454)	2024-11-11 23:57:21 +01:00
config.c	Add experimental mode with nontemporal stores (movnt[iq]) in own addr test, the only one where helps with performance across most processors I have access to, both single and multi-socket. Per #79, it saves several dozens of minutes on my 4S Opteron 62xx / 63xx servers equipped with 256 GB of RAM.	2025-02-06 23:05:23 +01:00
config.h	Add experimental mode with nontemporal stores (movnt[iq]) in own addr test, the only one where helps with performance across most processors I have access to, both single and multi-socket. Per #79, it saves several dozens of minutes on my 4S Opteron 62xx / 63xx servers equipped with 256 GB of RAM.	2025-02-06 23:05:23 +01:00
display.c	Add LoongArch support (#410)	2024-08-30 13:38:46 +02:00
display.h	WIP BROKEN Add SIMD tests for x86 & x86-64: MMX, SSE, SSE2, AVX ( #98 ).	2025-02-06 23:05:31 +01:00
error.c	WIP BROKEN Add SIMD tests for x86 & x86-64: MMX, SSE, SSE2, AVX ( #98 ).	2025-02-06 23:05:31 +01:00
error.h	WIP BROKEN Add SIMD tests for x86 & x86-64: MMX, SSE, SSE2, AVX ( #98 ).	2025-02-06 23:05:31 +01:00
interrupt.c	WIP BROKEN Add SIMD tests for x86 & x86-64: MMX, SSE, SSE2, AVX ( #98 ).	2025-02-06 23:05:31 +01:00
interrupt.h	Exclude copyright notices from Doxygen file descriptions.	2022-02-19 19:56:55 +00:00
main.c	WIP BROKEN Add SIMD tests for x86 & x86-64: MMX, SSE, SSE2, AVX ( #98 ).	2025-02-06 23:05:31 +01:00
test.h	WIP BROKEN Add SIMD tests for x86 & x86-64: MMX, SSE, SSE2, AVX ( #98 ).	2025-02-06 23:05:31 +01:00
version.h	Early bump to v8.00	2025-01-27 19:28:03 +01:00