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https://github.com/memtest86plus/memtest86plus.git
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3ce7c3fb39
* system/loongarch: Add 64-bit PCIe memory space mapping Added the 64-bit PCIe memory space mapping. From 0x8000000000ULL to 0xFD00000000ULL are LoongArch 64-bit PCIe memory spaces and need to be mapped. Signed-off-by: Chao Li <lichao@loongson.cn> * system/loongarch: Optimization timer on LoongArch Since some LoongArch64 CPUs stop the performance counters when ilde, the running time displayed on the screen is incorrect. Using stable counter can solve this problem, so remove the performance counters time, and add stable counter time. Signed-off-by: Chao Li <lichao@loongson.cn> --------- Signed-off-by: Chao Li <lichao@loongson.cn>
66 lines
1.4 KiB
C
66 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#ifndef TSC_H
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#define TSC_H
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/**
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* \file
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*
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* Provides access to the CPU timestamp counter.
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*
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*//*
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* Copyright (C) 2020-2022 Martin Whitaker.
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*/
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#include <stdint.h>
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#if defined(__loongarch_lp64)
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#include "cpuinfo.h"
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// LoongArch GCC builtin function
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#include <larchintrin.h>
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#endif
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#define rdtsc(low, high) \
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__asm__ __volatile__("rdtsc" \
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: "=a" (low), \
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"=d" (high) \
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)
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#define rdtscl(low) \
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__asm__ __volatile__("rdtsc" \
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: "=a" (low) \
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: /* no inputs */ \
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: "edx" \
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)
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/**
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* Reads and returns the timestamp counter value.
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*/
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#if defined(__i386__) || defined(__x86_64__)
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static inline uint64_t get_tsc(void)
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{
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uint32_t tl;
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uint32_t th;
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rdtsc(tl, th);
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return (uint64_t)th << 32 | (uint64_t)tl;
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}
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#elif defined(__loongarch_lp64)
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static inline uint64_t get_tsc(void)
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{
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uint64_t val = 0;
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static uint64_t stable_count_freq = 0;
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if (!stable_count_freq) {
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stable_count_freq = ((__cpucfg(0x4) * (__cpucfg(0x5) & 0xFFFF)) / ((__cpucfg(0x5) >> 16) & 0xFFFF)) / 1000; // KHz
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}
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__asm__ __volatile__(
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"rdtime.d %0, $zero\n\t"
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: "=r"(val)
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:
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);
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return (val * (clks_per_msec / stable_count_freq));
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}
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#endif
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#endif // TSC_H
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