From 4a9e759e4b2aabbb3399fa37e206c8de6d3c8c51 Mon Sep 17 00:00:00 2001
From: Magne Sjaastad <magne.sjaastad@ceetronsolutions.com>
Date: Fri, 26 Feb 2021 10:16:50 +0100
Subject: [PATCH] Streamlines : Avoid load of a single step

If only one time step is loaded, all other logic must be able to handle this situation. Load data for all time steps when asking for flow related data
Use absolute value when comparing flow values
---
 .../Streamlines/RimStreamlineDataAccess.cpp       |  5 +++--
 .../Streamlines/RimStreamlineGenerator2.cpp       |  2 +-
 .../ReservoirDataModel/RigCaseCellResultsData.cpp | 15 +++++++++------
 3 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/ApplicationLibCode/ProjectDataModel/Streamlines/RimStreamlineDataAccess.cpp b/ApplicationLibCode/ProjectDataModel/Streamlines/RimStreamlineDataAccess.cpp
index 586f8e0315..bf8208e42b 100644
--- a/ApplicationLibCode/ProjectDataModel/Streamlines/RimStreamlineDataAccess.cpp
+++ b/ApplicationLibCode/ProjectDataModel/Streamlines/RimStreamlineDataAccess.cpp
@@ -97,8 +97,9 @@ cvf::ref<RigResultAccessor> RimStreamlineDataAccess::getDataAccessor( cvf::Struc
 
     RigEclipseResultAddress address( RiaDefines::ResultCatType::DYNAMIC_NATIVE, resultname );
 
-    // Make sure we have the data we need loaded for the given phase and time step index
-    data->ensureKnownResultLoadedForTimeStep( address, timeIdx );
+    // Make sure we have the data loaded.
+    // NB, will trigger load of data for all time steps
+    data->ensureKnownResultLoaded( address );
 
     return RigResultAccessorFactory::createFromResultAddress( m_data, gridIdx, porModel, timeIdx, address );
 }
diff --git a/ApplicationLibCode/ProjectDataModel/Streamlines/RimStreamlineGenerator2.cpp b/ApplicationLibCode/ProjectDataModel/Streamlines/RimStreamlineGenerator2.cpp
index 41afe75019..0837a33f3a 100644
--- a/ApplicationLibCode/ProjectDataModel/Streamlines/RimStreamlineGenerator2.cpp
+++ b/ApplicationLibCode/ProjectDataModel/Streamlines/RimStreamlineGenerator2.cpp
@@ -55,7 +55,7 @@ void RimStreamlineGenerator2::generateTracer( RigCell                    cell,
     for ( auto faceIdx : m_allFaces )
     {
         double flowVelocity = m_dataAccess->combinedFaceValueByArea( cell, faceIdx, m_phases, dominantPhase ) * direction;
-        if ( flowVelocity > m_flowThreshold )
+        if ( std::abs( flowVelocity ) > m_flowThreshold )
         {
             m_seeds.push_back( std::make_pair( cellIdx, faceIdx ) );
         }
diff --git a/ApplicationLibCode/ReservoirDataModel/RigCaseCellResultsData.cpp b/ApplicationLibCode/ReservoirDataModel/RigCaseCellResultsData.cpp
index 0a6de494ff..2b0ee6a573 100644
--- a/ApplicationLibCode/ReservoirDataModel/RigCaseCellResultsData.cpp
+++ b/ApplicationLibCode/ReservoirDataModel/RigCaseCellResultsData.cpp
@@ -1237,13 +1237,16 @@ size_t RigCaseCellResultsData::findOrLoadKnownScalarResult( const RigEclipseResu
 
     if ( resVarAddr.isDivideByCellFaceAreaActive() )
     {
-        if ( !RigCaseCellResultCalculator::computeDivideByCellFaceArea( m_ownerMainGrid,
-                                                                        this->m_ownerCaseData,
-                                                                        m_porosityModel,
-                                                                        resVarAddr ) )
-
+        if ( !isDataPresent( scalarResultIndex ) )
         {
-            return cvf::UNDEFINED_SIZE_T;
+            if ( !RigCaseCellResultCalculator::computeDivideByCellFaceArea( m_ownerMainGrid,
+                                                                            this->m_ownerCaseData,
+                                                                            m_porosityModel,
+                                                                            resVarAddr ) )
+
+            {
+                return cvf::UNDEFINED_SIZE_T;
+            }
         }
 
         return scalarResultIndex;