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Added the remaining group tests that are correct.

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This commit is contained in:
Alf Birger Rustad 2020-04-22 11:26:23 +02:00
parent 7180f0a885
commit 70cc7767bb
1 changed files with 42 additions and 0 deletions
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42
compareECLFiles.cmake
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@ -510,6 +510,48 @@ add_test_compareECLFiles(CASENAME 9_2a_grpctl_msw_model2
REL_TOL ${rel_tol}
DIR model2)
add_test_compareECLFiles(CASENAME 9_3a_grpctl_stw_model2
FILENAME 9_3A_GINJ_REIN-G_STW
SIMULATOR flow
ABS_TOL ${abs_tol}
REL_TOL ${rel_tol}
DIR model2)
add_test_compareECLFiles(CASENAME 9_3a_grpctl_msw_model2
FILENAME 9_3A_GINJ_REIN-G_MSW
SIMULATOR flow
ABS_TOL ${abs_tol}
REL_TOL ${rel_tol}
DIR model2)
add_test_compareECLFiles(CASENAME 9_4a_grpctl_stw_model2
FILENAME 9_4A_WINJ_MAXWRATES_MAXBHP_GCONPROD_1L_STW
SIMULATOR flow
ABS_TOL ${abs_tol}
REL_TOL ${rel_tol}
DIR model2)
add_test_compareECLFiles(CASENAME 9_4a_grpctl_msw_model2
FILENAME 9_4A_WINJ_MAXWRATES_MAXBHP_GCONPROD_1L_MSW
SIMULATOR flow
ABS_TOL ${abs_tol}
REL_TOL ${rel_tol}
DIR model2)
add_test_compareECLFiles(CASENAME 9_4b_grpctl_msw_model2
FILENAME 9_4B_WINJ_VREP-W_MSW
SIMULATOR flow
ABS_TOL ${abs_tol}
REL_TOL ${rel_tol}
DIR model2)
add_test_compareECLFiles(CASENAME 9_4c_grpctl_msw_model2
FILENAME 9_4C_WINJ_GINJ_VREP-W_REIN-G_MSW
SIMULATOR flow
ABS_TOL ${abs_tol}
REL_TOL ${rel_tol}
DIR model2)
add_test_compareECLFiles(CASENAME wsegsicd
FILENAME TEST_WSEGSICD
SIMULATOR flow