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https://github.com/OPM/opm-simulators.git
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Merge pull request #336 from andlaus/fix_extra_warnings
fix extra compiler warnings
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commit
ad6645b8d3
@ -104,12 +104,14 @@ initSimulator(const char *filename)
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return std::unique_ptr<Simulator>(new Simulator);
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}
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ERT::ert_unique_ptr< ecl_sum_type, ecl_sum_free > readsum( const std::string& base ) {
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ERT::ert_unique_ptr<ecl_sum_type, ecl_sum_free> readsum(const std::string& base);
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ERT::ert_unique_ptr<ecl_sum_type, ecl_sum_free> readsum(const std::string& base)
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{
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return ERT::ert_unique_ptr<ecl_sum_type, ecl_sum_free>(
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ecl_sum_fread_alloc_case( base.c_str(), ":" )
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);
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ecl_sum_fread_alloc_case(base.c_str(), ":"));
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}
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void test_summary();
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void test_summary()
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{
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typedef typename TTAG(TestEclOutputTypeTag) TypeTag;
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@ -176,8 +178,9 @@ void test_summary()
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CHECK_CLOSE(roip2, ecl_sum_get_general_var( resp, 1, "ROIP:2" ), 1e-3 );
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}
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void test_readWriteWells() {
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void test_readWriteWells();
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void test_readWriteWells()
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{
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using opt = Opm::data::Rates::opt;
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Opm::data::Rates r1, r2, rc1, rc2, rc3;
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@ -211,14 +214,14 @@ void test_readWriteWells() {
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* the connection keys (active indices) and well names correspond to the
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* input deck. All other entries in the well structures are arbitrary.
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*/
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w1.connections.push_back( { 88, rc1, 30.45, 123.45 } );
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w1.connections.push_back( { 288, rc2, 33.19, 67.89 } );
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w1.connections.push_back( { 88, rc1, 30.45, 123.45, 0.0, 0.0, 0.0 } );
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w1.connections.push_back( { 288, rc2, 33.19, 67.89, 0.0, 0.0, 0.0 } );
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w2.rates = r2;
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w2.bhp = 2.34;
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w2.temperature = 4.56;
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w2.control = 2;
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w2.connections.push_back( { 188, rc3, 36.22, 19.28 } );
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w2.connections.push_back( { 188, rc3, 36.22, 19.28, 0.0, 0.0, 0.0 } );
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Opm::data::Wells wellRates;
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@ -214,6 +214,7 @@ static Opm::EquilRecord mkEquilRecord( double datd, double datp,
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return EquilRecord( rec );
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}
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void test_PhasePressure();
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void test_PhasePressure()
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{
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typedef std::vector<double> PVal;
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@ -246,6 +247,7 @@ void test_PhasePressure()
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CHECK_CLOSE(ppress[1][last ] , 166.5e3 , reltol);
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}
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void test_CellSubset();
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void test_CellSubset()
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{
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typedef std::vector<double> PVal;
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@ -335,6 +337,7 @@ void test_CellSubset()
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CHECK_CLOSE(ppress[1][last ] , 166.5e3 , reltol);
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}
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void test_RegMapping();
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void test_RegMapping()
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{
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typedef std::vector<double> PVal;
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@ -422,6 +425,7 @@ void test_RegMapping()
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CHECK_CLOSE(ppress[1][last ] , 166.5e3 , reltol);
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}
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void test_DeckAllDead();
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void test_DeckAllDead()
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{
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typedef TTAG(TestEquilTypeTag) TypeTag;
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@ -446,6 +450,7 @@ void test_DeckAllDead()
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CHECK_CLOSE(pressures[1][last] , 1.504526940e7 , reltol);
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}
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void test_CapillaryInversion();
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void test_CapillaryInversion()
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{
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// Test setup.
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@ -497,6 +502,7 @@ void test_CapillaryInversion()
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}
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}
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void test_DeckWithCapillary();
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void test_DeckWithCapillary()
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{
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typedef typename TTAG(TestEquilTypeTag) TypeTag;
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@ -535,6 +541,7 @@ void test_DeckWithCapillary()
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}
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}
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void test_DeckWithCapillaryOverlap();
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void test_DeckWithCapillaryOverlap()
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{
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typedef typename TTAG(TestEquilTypeTag) TypeTag;
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@ -594,6 +601,7 @@ void test_DeckWithCapillaryOverlap()
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}
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}
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void test_DeckWithLiveOil();
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void test_DeckWithLiveOil()
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{
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typedef typename TTAG(TestEquilTypeTag) TypeTag;
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@ -671,6 +679,7 @@ void test_DeckWithLiveOil()
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}
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}
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void test_DeckWithLiveGas();
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void test_DeckWithLiveGas()
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{
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typedef typename TTAG(TestEquilTypeTag) TypeTag;
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@ -751,6 +760,7 @@ void test_DeckWithLiveGas()
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}
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}
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void test_DeckWithRSVDAndRVVD();
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void test_DeckWithRSVDAndRVVD()
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{
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typedef typename TTAG(TestEquilTypeTag) TypeTag;
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@ -851,6 +861,7 @@ void test_DeckWithRSVDAndRVVD()
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}
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void test_DeckWithPBVDAndPDVD();
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void test_DeckWithPBVDAndPDVD()
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{
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typedef typename TTAG(TestEquilTypeTag) TypeTag;
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@ -941,6 +952,7 @@ void test_DeckWithPBVDAndPDVD()
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}
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}
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void test_DeckWithSwatinit();
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void test_DeckWithSwatinit()
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{
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#if 0
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