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fix: nvidia displayport2 bandwidth calculation (#1090)

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* fix: nvidia displayport2 bandwidth calculation fix

* move vendor specific heuristics to relevant controllers

* handle case where linkBW and dp2LinkBW are 0

* Revert "handle case where linkBW and dp2LinkBW are 0"

This reverts commit 7c805f6ebf.
This commit is contained in:
Roman Makarov
2026-06-25 22:50:20 +03:00
committed by GitHub
parent 36e273fc90
commit 45f962b56c
3 changed files with 24 additions and 14 deletions
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lact-daemon/src/server/display.rs
+8 -10
View File
@@ -5,7 +5,6 @@ use tracing::warn;
const BASE_RATE_MULTIPLIER: u32 = 270;
const UHBR_RATE_MULTIPLIER: u32 = 10;
const UHBR_RATE_THRESHOLD: u32 = 1000;
pub fn get_base_displays_info(device_path: &Path) -> anyhow::Result<DisplaysInfo> {
let path_parent = device_path.parent().context("Invalid path")?;
@@ -118,13 +117,12 @@ fn get_display_entry(path: &Path) -> anyhow::Result<(String, DisplayInfo)> {
Ok((connector.to_owned(), info))
}
pub fn dp_rate_to_bandwidth(value: u32) -> u32 {
// Ref: https://elixir.bootlin.com/linux/v7.0.10/source/drivers/gpu/drm/amd/display/dc/dc_dp_types.h#L41
// Applies not only to AMD, as this is from the DP spec
// Values are for conversion to Mbps
if value < UHBR_RATE_THRESHOLD {
value * BASE_RATE_MULTIPLIER
} else {
value * UHBR_RATE_MULTIPLIER
}
// Values are for conversion to Mbps
pub fn dp1_rate_to_bandwidth(value: u32) -> u32 {
value * BASE_RATE_MULTIPLIER
}
// Values are for conversion to Mbps
pub fn dp2_rate_to_bandwidth(value: u32) -> u32 {
value * UHBR_RATE_MULTIPLIER
}
lact-daemon/src/server/gpu_controller/amd.rs
+9 -1
View File
@@ -51,6 +51,7 @@ const AMDGPU_FAMILY_GC_11_0_0: u32 = 145;
const FAN_CONTROL_RETRIES: u32 = 10;
const MAX_PSTATE_READ_ATTEMPTS: u32 = 5;
const REQUIRE_MANUAL_DEVICE_IDS: [&str; 3] = ["163F", "1435", "15BF"];
const UHBR_RATE_THRESHOLD: u32 = 1000;
const AMDGPU_IDS_FLAGS_FUSION: u64 = 0x1;
const HSA_CACHE_TYPE_DATA: u32 = 0x0000_0001;
const HSA_CACHE_TYPE_INSTRUCTION: u32 = 0x0000_0002;
@@ -1471,7 +1472,14 @@ impl GpuController for AmdGpuController {
.and_then(|value| u32::from_str_radix(value, 16).ok())
.context("Invalid bandwidth value")?;
*bandwidth = Some(crate::server::display::dp_rate_to_bandwidth(bw_enum));
// Ref: https://elixir.bootlin.com/linux/v7.0.10/source/drivers/gpu/drm/amd/display/dc/dc_dp_types.h#L41
// AMD reports legacy DP link rates as DP spec codes, while DP2 UHBR
// rates are reported in 10 Mbps units. UHBR10 starts at 1000.
*bandwidth = Some(if bw_enum < UHBR_RATE_THRESHOLD {
crate::server::display::dp1_rate_to_bandwidth(bw_enum)
} else {
crate::server::display::dp2_rate_to_bandwidth(bw_enum)
});
}
}
lact-daemon/src/server/gpu_controller/nvidia.rs
+7 -3
View File
@@ -1343,9 +1343,13 @@ impl GpuController for NvidiaGpuController {
match handle.get_dp_link_config(display_id) {
Ok(params) => {
*lanes = Some(params.laneCount.try_into()?);
*bandwidth = Some(
crate::server::display::dp_rate_to_bandwidth(params.linkBW),
);
*bandwidth = Some(if params.linkBW != 0 {
crate::server::display::dp1_rate_to_bandwidth(params.linkBW)
} else {
crate::server::display::dp2_rate_to_bandwidth(
params.dp2LinkBW,
)
});
}
Err(err) => {
warn!("could not fetch DP info for display {key}: {err:#}");