Configure: set cache line size for loongarch64

Section 8.2 table 54, registers 0x11 - 0x14 (2^6 = 64 bytes)
<https://loongson.github.io/LoongArch-Documentation/Loongson-3A5000-usermanual-EN.html#instruction-set-features-implemented-in-3a5000>

There is no intent to cover 32-bit LoongArch which acceptably falls
through to the default.
This commit is contained in:
Miao Wang authored and Andrew Clayton committed 2026-06-23 15:24:27 +01:00
1 parent e01f4fe3a9
commit be84ac8bda
1 file changed
+5
+5
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@@ -130,6 +130,11 @@ case "$NGX_MACHINE" in
NGX_MACH_CACHE_LINE=256
;;
loongarch64)
have=NGX_ALIGNMENT value=16 . auto/define
NGX_MACH_CACHE_LINE=64
;;
*)
have=NGX_ALIGNMENT value=16 . auto/define
NGX_MACH_CACHE_LINE=32