Commit Graph
3 Commits
Author SHA1 Message Date
Yingle Hou 153fcfd8d7 cputest: Add CPUID data for Hygon Dhyana 7185 32-core Processor
Add Hygon Dhyana CPU data test case related files.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Yingle Hou <houyingle@hygon.cn>
2019-12-13 13:05:01 +00:00
Yingle Hou 7a53afcd10 cpu: Add new Dhyana CPU model
Add Hygon Dhyana CPU model to the processor model.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Yingle Hou <houyingle@hygon.cn>
2019-12-13 13:05:00 +00:00
Yingle Hou 528356f46b cpu: Remove the verification conditions of the model in the x86 signatures
The x86ModelParseSignatures function makes an assumption that CPU signature
model equals 0 as an invalid case. While in Hygon processor definition, A1
version (model 0, stepping 1) is mass production version, to support Hygon
Dhyana A1 version, we have removed CPU signature model zero checking condition.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Yingle Hou <houyingle@hygon.cn>
2019-12-13 13:05:00 +00:00