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Generalize the SMBus IO Enable quirk on all Intel ICHs
This has been tested safe on every ICH since the very first one by CPU-Z. It also solves various SMBus access issues on Mobile PCHs (like #157)
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@ -99,15 +99,6 @@ static void amd_k8_revfg_temp(void)
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cpu_temp_offset = 21.0f;
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}
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static void adl_unlock_smbus(void)
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{
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uint16_t x = pci_config_read16(0, 31, 4, 0x04);
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if (!(x & 1)) {
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pci_config_write16(0, 31, 4, 0x04, x | 1);
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}
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}
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// ---------------------
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// -- Public function --
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// ---------------------
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@ -208,13 +199,4 @@ void quirks_init(void)
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}
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}
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}
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// --------------------------------------------------
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// -- SMBus unlock for ADL-N (and probably others) --
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// --------------------------------------------------
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if (imc_type == IMC_ADL_N && pci_config_read16(0, 31, 4, 0x2) == 0x54A3) { // ADL-N
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quirk.id = QUIRK_ADL_SMB_UNLOCK;
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quirk.type |= QUIRK_TYPE_SMBUS;
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quirk.process = adl_unlock_smbus;
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}
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}
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@ -28,8 +28,7 @@ typedef enum {
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QUIRK_X10SDV_NOSMP,
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QUIRK_K8_BSTEP_NOTEMP,
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QUIRK_K8_REVFG_TEMP,
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QUIRK_AMD_ERRATA_319,
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QUIRK_ADL_SMB_UNLOCK
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QUIRK_AMD_ERRATA_319
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} quirk_id_t;
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typedef struct {
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@ -1340,10 +1340,18 @@ static bool ich5_get_smb(void)
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{
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uint16_t x;
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// Enable SMBus IO Space if disabled
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x = pci_config_read16(0, smbdev, smbfun, 0x4);
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if (!(x & 1)) {
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pci_config_write16(0, smbdev, smbfun, 0x4, x | 1);
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}
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// Read Base Address
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x = pci_config_read16(0, smbdev, smbfun, 0x20);
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smbusbase = x & 0xFFF0;
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// Enable I2C Bus
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// Enable I2C Host Controller Interface if disabled
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uint8_t temp = pci_config_read8(0, smbdev, smbfun, 0x40);
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if ((temp & 4) == 0) {
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pci_config_write8(0, smbdev, smbfun, 0x40, temp | 0x04);
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