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Blocked dims hwc 2021/3 (#4729)

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* Fix for BlockedDims

* Added test for HWC layout
This commit is contained in:
Ilya Lavrenov 2021-03-11 16:02:25 +03:00 committed by GitHub
parent d77bc36dcd
commit c9d5d95e2c
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2 changed files with 14 additions and 1 deletions
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2
inference-engine/src/inference_engine/ie_layouts.cpp
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@ -325,7 +325,7 @@ BlockingDesc::BlockingDesc(const SizeVector& dims, Layout layout): offsetPadding
case Layout::HWC:
checkDims(dims.size(), 3);
l_order = {1, 2, 0};
l_dims = dims;
l_dims = {dims[1], dims[2], dims[0]};
break;
case Layout::CN:
checkDims(dims.size(), 2);

13
inference-engine/tests/functional/inference_engine/tensor_desc_test.cpp
View File

@ -44,6 +44,19 @@ TEST_F(TensorDescTests, CreateBlockedBlobNCDHW) {
ASSERT_EQ(Layout::BLOCKED, blockedBlob->getTensorDesc().getLayout());
}
TEST_F(TensorDescTests, CompareHWCandCHWLayouts) {
TensorDesc descCHW(Precision::FP32, {1, 3, 4}, Layout::CHW);
TensorDesc descHWC(Precision::FP32, {1, 3, 4}, Layout::HWC);
SizeVector chw = {0, 1, 2};
SizeVector hwc = {1, 2, 0};
ASSERT_NE(descCHW, descHWC);
ASSERT_NE(descCHW.getBlockingDesc(), descHWC.getBlockingDesc());
ASSERT_NE(descCHW.getBlockingDesc().getOrder(), descHWC.getBlockingDesc().getOrder());
ASSERT_EQ(descCHW.getBlockingDesc().getOrder(), chw);
ASSERT_EQ(descHWC.getBlockingDesc().getOrder(), hwc);
}
TEST_F(TensorDescTests, CompareNHWCandNCHWLayouts) {
TensorDesc descNCHW(Precision::FP32, {1, 3, 4, 2}, Layout::NCHW);
TensorDesc descNHWC(Precision::FP32, {1, 3, 4, 2}, Layout::NHWC);