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Author SHA1 Message Date
Sungeun Kim da662116d4 parameter's event will be included execution args (#21377) 
- all primitives generate event.
- remove reorder from test-case
 2023-12-18 10:40:20 +09:00
Sungeun Kim 0b49bb99d0 [GPU] dump graphs during execution (#21411) 
* dump graphs during execution
 2023-12-12 13:16:02 +09:00
Sungeun Kim 07bcb8b6ed This case will check the layout of condition in these conditions. (#21335) 
- it re-allocated at primitive_inst::realloc_if_needed().
- it can be skip subgraph.
 2023-11-29 09:42:16 +00:00
Sungeun Kim 1a235ffe79 get layout from get_output_layout in primitive_inst (#21294) 2023-11-27 13:02:02 +04:00
Sungeun Kim 5365bfe0a7 [GPU] remove setting threshold manually for dynamic 1d conv (#21028) 2023-11-15 16:54:22 +09:00
Sungeun Kim b1705e8bd3 [GPU] clean up for extend pad/stride/dilation (#20828) 
* clean up for extend pad/stride/dilation
 2023-11-09 20:48:34 +09:00
Sungeun Kim 9cc4c25e48 [GPU] print datashape of input for benchmark_app (#20943) 
* print datashape of input for benchmark_app
 2023-11-09 20:46:50 +09:00
Sungeun Kim 4512141111 [GPU] fix axis for pad/stride/dilation when 1d conv (#20746) 
* fix axis for pad/stride/dilation when 1d conv
* add test-cases for 1d conv with explicit pad
 2023-10-30 19:06:29 +09:00
Sungeun Kim 30a038c776 [GPU] Gather needs to keep the original input/output rank (#20042) 
* Gather needs to keep the original input/output rank
  - because the parameters as indices, batch_dims and axis depend on the rank.
  - add input_rank to gather primitive.
* don't query on set_preferred_formats pass
  -when the force_implementations is set.
  -when forcing_impl is not onednn.
 2023-10-18 16:28:22 +09:00
Sungeun Kim b7758b0504 [GPU] update the data-type of primitive from ops (#19302) 
* set the data-type of transpose by dt of ops.
* set output_data in calc_output_layouts
 2023-09-06 13:30:53 +09:00
Sungeun Kim 181238bcfb [GPU] Move unit test file to the proper location (#18545) 2023-07-14 14:19:56 +04:00
Sungeun Kim 6913a5effb [GPU] set fixed random seed (#18144) 
* random_generator
* apply random_generator to all tests
 2023-07-13 21:13:29 +09:00
Sungeun Kim 3c485feea8 removed case to choose onednn impl for deconv (#17108) 
- in_dt(f16) wei_dt(f16) out_dt(f32)
 2023-04-26 13:20:11 +09:00
Sungeun Kim 8c09a128ac [GPU] update weights_layout for GroupConv 1d spatial (#17109) 
* update weights_layout for GroupConv 1d spatial
 2023-04-25 18:54:54 +09:00
Sungeun Kim fef04e468a [GPU] add WA to avoid hang issue. (#16724) 2023-04-05 16:32:42 +04:00
Sungeun Kim 0365ebf5ad disable test case: fusings_gpu/lrn_fp16_eltwise_activation.basic/7 (#16149) 2023-03-09 08:38:33 +00:00
Sungeun Kim 0a224a8804 [GPU] Geti: Add jit value for fused_ops in strided_slice_ref (#15634) 
* Add jit value for fused_ops in strided_slice_ref
* add test-cases for strided_slice_fusion
* add checking supported fusing ops for strided_slice
 2023-02-16 12:12:54 +09:00
Sungeun Kim 00d9ed0da4 [GPU] fix bug on resample_opt (#15434) 
* fix bug: wrong feature slice num
 2023-02-07 16:29:18 +09:00
Sungeun Kim 9e54ac6518 [GPU] Add black list to avoid fusing crop before experimental_detectron_roi_feature_extractor (#15036) 
* Add black list to avoid fusing crop before experimental_detectron_roi_feature_extractor
* propagate crop when crop is cascaded
 2023-01-27 18:52:37 +09:00
Sungeun Kim 8ab2e0e8d6 [GPU] bugfix: partial subgroup issue (#14845) 
Behavior is undefined if the subgroup size is smaller than
the maximum subgroup size; in other words, if this is a partial subgroup.
 2023-01-17 16:05:01 +09:00
Sungeun Kim b799e3eb91 [GPU] set b_fs_yx_fsv32 for first conv and dt is U8. (#14454) 
* set b_fs_yx_fsv32 for first conv and dt is U8.

* check input format is bfyx.
 2022-12-08 16:52:30 +09:00
Sungeun Kim 6bcdaa782a fusing reorder after quantize (#14235) 2022-11-28 16:04:54 +09:00
Sungeun Kim 9bcc730bec check prev is next's dep(0). (#14107) 2022-11-22 12:05:28 +09:00
Sungeun Kim 9d4d4888b2 [GPU] avoid to fuse reorder if the reorder could be fused. (#14019) 
- Don't fuse reorder if the reorder is not input 0.
* add errta data types.

-add test cases
-get next.dep(0) only
 2022-11-21 10:08:28 +09:00
Sungeun Kim 7cf727cb26 fuse reorder to next conv (#13683) 
-in_fmt:bfyx, out_fmt:b_fs_yx_fsv16, bs_fs_yx_bsv16_fsv16
-shallow input conv
 2022-11-09 13:52:26 +09:00
Sungeun Kim f1cf1948d5 [GPU] add errata for onednn layout selection (#13758) 2022-11-04 15:44:36 +04:00
Sungeun Kim eeabb86b80 [GPU] set bfyx to input format for shallow conv (#13614) 
* set bfyx to input format for shallow conv
 2022-10-31 10:22:39 +09:00
Sungeun Kim 168cf0a1a0 [GPU] remove WA for fallback pooling to cldnn. (#13540) 
* remove WA for fallback pooling to cldnn.
* remove unnecessary code for deconv
* add format::bfzyx/b_fs_zyx_fsv32 to reduction_onednn
 2022-10-26 13:39:20 +09:00
Sungeun KimandJade Cho b21510f9f6 Optimize b16 (#13205) 
* optimize models on batch16
* add is_os_yx_isv16_osv8 to format_traits_map
* choose onednn deconv
  - remove checking deconv cross-precision
  - implicit concat could not support byxf.

Co-authored-by: Jade Cho <jade.cho@intel.com>
 2022-10-18 13:35:45 +09:00
Sungeun Kim dc7f8249a7 [GPU] optimized out detection_out if nms_threshold is under -1. (#12730) 2022-08-25 11:05:38 +09:00
Sungeun Kim 3bd475ad26 [GPU] integrate persistent caching for onednn (#12094) 
* integrate persistant caching for onednn
* add api to save/load binary file.
 2022-07-18 20:13:46 +09:00
Sungeun Kim 654105d567 Set reorder format in reorder_inputs pass (#11992) 
* Set reorder format in reorder_inputs pass
* set zyx_fsv16 formats if input is zyx_fsv4 formats
 2022-07-05 18:20:01 +09:00
Sungeun Kim a454b7371e add zyx_fsv32 format for onednn deconv (#11873) 2022-06-14 22:04:29 +09:00
Sungeun Kim 9bda2bd580 lws quantize/eltwise (#11851) 2022-06-13 11:18:49 +09:00
Sungeun Kim 2c4cb88862 [83906] DG2 Systolic engine not getting used for fp16 Action Recognition model (#11815) 
* shallow feature convolution needs to set by zyx_fsv2

* bug fix: wrong get_output_layout calling in is_mixedLayout
 2022-06-08 16:48:40 +09:00
Sungeun Kim 8029fd9675 add mixed precision case (#11747) 2022-06-04 11:40:52 +09:00
Sungeun Kim 82fdf165eb [GPU] choose onednn for 3d conv (#10857) 
* add formats for 3d conv
   data formats
   -bs_fs_zyx_bsv32_fsv32
   -bs_fs_zyx_bsv32_fsv16
   -bs_fs_zyx_bsv8_fsv4
   -bs_fs_zyx_bsv8_fsv2
   -bs_fs_zyx_bsv16_fsv32
   -b_fs_zyx_fsv2, b_fs_zyx_fsv4
   weight formats
   -os_is_zyx_osa2_isa8_osv8_isv2
   -os_is_zyx_osv8_isv4
   -os_is_zyx_osv8_isv2
   -gs_oizyx_gsv32
* add supported formats for primitives
* choose onednn convolution impl for 3d conv
* optimize layout of shallow depth convolution
* remove reorder for conv
* Don't remove reorder between bs_fs_zyx_b32_f16/f32 and bfyx.
* add formats to SetDefault() to optimize gws/lws for quantize/eltwise
* fallback cldnn if onednn pooling's layout is b_fs_zyx_fsv32 and i8.
* fixed wrong position for new weight formats
* restore imad_case()
* This func is used to choose format for fallbacked cldnn
* [GPU] add debug flag: OV_GPU_SerialCompile
    0(default): parallel compile
    1: serial compile
* add is_mixed_layout
* remove format::bs_fs_zyx_bsv8_fsv4 in needs_onednn_small_ic_to_blocked
* prevent to fuse the reorder which is between quantize and conv
* shallow feature first conv
 2022-05-31 07:54:00 +09:00
Sungeun Kim 7a1e7f122f [GPU] some convs are in ref for WDSR (#11728) 
* add supported data types for onednn conv

* Remove case: in_f32 to out_f32 in are_data_types_suitable_for_onednn
 2022-05-27 13:50:30 +09:00
Sungeun Kim bf3046e3a0 [GPU] Integration Prelu fusing (#8958) 
* [GPU] Add new data format: os_is_yx_osa2_isa8_osv8_isv2

* fusing prelu

- add onednn_post_op_type::binary_relu

* update onednn_gpu
 2021-12-14 20:09:50 +09:00
Sungeun Kim 86ab2e5f1b Remove reorder after depth_to_space2 (#8289) 
* Remove reorder after depth_to_space

* Remove reorder after region_yolo

* add ignore conditions

-if input node is not depth_to_space and region_yolo

* fix bug: The empty std::list causes undefined behavior.

* remove ignore_conditions flag
 2021-12-06 17:35:56 +09:00
Sungeun Kim 8f64b8e2e8 [GPU] Update flops calculation for DG2/ATS (#8758) 2021-11-24 09:28:22 +03:00
Sungeun KimandKim, Mingyu e0cea200e3 [GPU] Onednn integration for pooling (#7753) 
* [GPU] Onednn integration for pooling primitive

* layout_optimizer for pooling

* Padding code merge for onednn

Co-authored-by: Kim, Mingyu <mingyu.kim@intel.com>
 2021-10-01 15:02:30 +09:00
Sungeun Kim 1829fc5b8b [GPU] Optimized ocl nms implementation (#5411) 2021-08-25 09:50:21 +03:00
Sungeun Kim 163d0b27b0 [IE CLDNN] Fixed a region_yolo bug (#51761) (#5826) 
Signed-off-by: Kim, SungEun <sungeun.kim@intel.com>
 2021-05-26 20:21:42 +03:00
Sungeun Kim e40a44202e [IE CLDNN] Add a byxf format for RegionYolo op. (#4451) 2021-03-09 14:48:00 +03:00