Files
memtest86plus/system
Sam Demeulemeester fa4e903509 Fix APIC Timer detection fail on some modern mobile/embedded PCH
On some modern ULV cores (eg: Gracemont), the 2 following I/O reads to check APIC Timer working status are fused in the frontend, leading to the same value being reported twice and the code falling back to the (unusually disabled on these platforms) PIT timer.

Whether this behavior is intentional or not is unknown.

As usleep/sleep is not available at this point, a dirty delay is added between the two reads.
2023-04-23 22:45:27 +02:00
..
2022-08-15 17:51:48 +02:00
2022-09-09 18:09:13 +02:00
2022-02-28 22:05:21 +00:00
2022-02-28 22:05:21 +00:00
2020-05-24 21:30:55 +01:00
2022-02-28 22:05:21 +00:00
2022-02-28 22:05:21 +00:00
2022-04-04 18:31:54 +02:00
2022-06-19 16:39:03 +02:00